Texas Instruments Corporation

Manjula N Variyam

Tz-Cheng Chiu

A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and layering a surrounding material over an extended edge of the conductive bump layer. The surrounding material is patterned to expose a pad face and of a portion of the sides of the conductive bump layer, such that the pad face is disposed above the surface of the surrounding material. The surrounding material may be patterned by a photolithography operation or alternatively, a laser-drill operation.

Raised solder-mask-defined (SMD) solder ball pads for a laminate electronic circuit board

Embodiments of the present invention may provide ways and uses for correlating actual wire bonding machine adjustment parameters to inputs needed for FEA simulations in modeling actual wire bonding operations of a specified capillary design and wire bonding machine. Simulations of wire bonding operations using the specified capillary design are performed with a range of inputs (e.g., capillary displacement, wire yield strength) to develop empirical equations relating to the simulations. Actual wire bonding operations are performed using the specified capillary design with ranges of the actual wire bonding machine adjustment parameters, and the results provide empirical equations relating to the actual wire bonding machine adjustment parameters. The empirical equations are combined to provide empirical equations for the simulation inputs as functions of the actual wire bonding machine adjustment parameters. Such equations may aid in performing chip failure analysis and/or may be incorporated into design rules.

Wire bonding simulation

According to one embodiment of the invention, a method includes providing a semiconductor chip, providing a substrate, forming a plurality of cantilevered springs outwardly from either the semiconductor chip or the substrate, engaging the cantilevered springs with respective contact pads on either the semiconductor chip or the substrate with a fixture, encapsulating the semiconductor chip and cantilevered springs with a molding, and curing the molding.

Method and system for chip-to-package interconnection

A plastic package for use in semiconductor devices, which has a plurality of metallic terminals exposed on a package surface and a metallic bump attached to each of said terminals. The bumps are made of reflowable metal and have approximately uniform height. An adherent layer of polymer material covers the package surface and surrounds each of the bumps to form a solid meniscus. The layer has a thickness between a quarter and one half of the bump height. An analogous methodology applies to plastic assembly boards.

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Plano, TX, United States of America

Manjula N Variyam