Intel Corporation

Manish Dubey

Rajendra C Dias

Sanka Ganesan

Ram S Viswanath

Omkar G Karhade

Robert Alan May

Nitin A Deshpande

Tarek A Ibrahim

Edvin Cetegen

Xavier Francois Brun

Yiqun Bai

Jason M Gamba

Sairam Agraharam

Yonghao Xiu

Patrick Nardi

Peng T Li

Digvijay Ashokkumar Raorane

Mitul Bharat Modi

Kelly P Lofgreen

Purushotham Kaushik Muthur Srinath

Arjun Krishnan

Mohit Bhatia

Bamidele Daniel Falola

Jan Krajniak

Jinhe Liu

Aleksandar Aleksov

Debendra Mallik

Ravindranath Vithal Mahajan

Wei Ey Li

James Chris Matayabas, Jr

Carl L Deppisch

Srikant Nekkanty

Sergio Antonio Chan Arguedas

Nisha Ananthakrishnan

Deepak Goyal

Rajen S Sidhu

Bharat P Penmecha

Suriyakala Ramalingam

Aastha Uppal

Baris Bicen

Syadwad Jain

Ken P Hackenberg

Tatyana N Andryushchenko

Lars D Skoglund

Zhizhong Tang

Michael Aaron Schroeder

Amitesh Saha

Wei Hu

Hitesh Arora

Hsin-Yu Li

Malavarayan Sankarasubramanian

David W Staines

Yongmei Liu

Shenavia S Howell

Anurag Tripathi

Kumar Abhishek Singh

Marco Aurelio Cartas

Jingyi Huang

Michelle S Phen

David Woodhams

Emre Armagan

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic component may include a substrate having a first face and an opposing second face, wherein the substrate includes a through-substrate via (TSV); a first mold material region at the first face, wherein the first mold material region includes a first through-mold via (TMV) conductively coupled to the TSV; and a second mold material region at the second face, wherein the second mold material region includes a second TMV conductively coupled to the TSV.

Microelectronic component having molded regions with through-mold vias

Embodiments disclosed herein include multi-die packages with open cavity bridges. In an example, an electronic apparatus includes a package substrate having alternating metallization layers and dielectric layers. The package substrate includes a first plurality of substrate pads and a second plurality of substrate pads. The package substrate also includes an open cavity between the first plurality of substrate pads and the second plurality of substrate pads, the open cavity having a bottom and sides. The electronic apparatus also includes a bridge die in the open cavity, the bridge die including a first plurality of bridge pads, a second plurality of bridge pads, and conductive traces. An adhesive layer couples the bridge die to the bottom of the open cavity. A gap is laterally between the bridge die and the sides of the open cavity, the gap surrounding the bridge die.

Open cavity bridge co-planar placement architectures and processes

Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.

Microelectronic structures including bridges

Embodiments may relate to a microelectronic package that includes a lid coupled with a package substrate such that a die is positioned between the lid and the package substrate. The lid may include a heating element that is to heat an area between the lid and the die. Other embodiments may be described or claimed.

Integrated heat spreader (IHS) with heating element

Multichip semiconductor package including a bridge die disposed in a cavity having non-planar interconnects

Disclosed herein are channeled lids for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a die between a lid and a package substrate. A bottom surface of the lid may include a channel that at least partially overlaps the die.

Channeled lids for integrated circuit packages

An integrated circuit package may be formed having at least one heat dissipation structure within the integrated circuit package itself. In one embodiment, the integrated circuit package may include a substrate; at least one integrated circuit device, wherein the at least one integrated circuit device is electrically attached to the substrate; a mold material on the substrate and adjacent to the at least one integrated circuit device; and at least one heat dissipation structure contacting the at least one integrated circuit, wherein the at least one heat dissipation structure is embedded either within the mold material or between the mold material and the substrate.

Thermal management solutions for integrated circuit packages

Devices and methods disclosed herein can include a conductive foam having pores disposed within the conductive foam. The conductive foam can be compressible between an uncompressed thickness and a compressed thickness. The compressed thickness can be ninety-five percent or less of the uncompressed thickness. In one example, a filler can be disposed in the pores of the conductive foam. The filler can include a first thermal conductivity. The first thermal conductivity can be greater than a thermal conductivity of air.

Foam composite

An electronic package that includes a substrate and a die attached to the substrate. The electronic package further includes a stiffener that is attached to the substrate adjacent to the die. The stiffener is formed of a first layer made from one material and a second layer made from a different material.

Electronic package that includes multi-layer stiffener

In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for gradient encapsulant protection of devices in stretchable electronic. For instance, in accordance with one embodiment, there is an apparatus with an electrical device on a stretchable substrate; one or more stretchable electrical interconnects coupled with the electrical device; one or more electrical components electrically coupled with the electrical device via the one or more stretchable electrical interconnects; and a gradient encapsulating material layered over and fully surrounding the electrical device and at least a portion of the one or more stretchable electrical interconnects coupled thereto, in which the gradient encapsulating material has an elastic modulus greater than the stretchable substrate and in which the elastic modulus of the gradient encapsulating material is less than the electrical device. Other related embodiments are disclosed.

Gradient encapsulant protection of devices in stretchable electronics

Some embodiments relate to an electronic package. The electronic package includes a substrate and a die attached to the substrate. The electronic package further includes an underfill positioned between the die and the substrate due to capillary action. A support surrounds the die. The support provides the same beneficial fillet geometry on all die edges. Therefore, the support provides similar stress reduction on all die edges. Other embodiments relate to method of fabricating an electronic package. The method includes attaching a die to a substrate and inserting an underfill between the die and the substrate using capillary action. The method further includes placing a support around the die such that the support surrounds the die.

Electronic package and method of connecting a first die to a second die to form an electronic package

An electronic package that includes a substrate and a die attached to the substrate. A plurality of supports attached to the substrate adjacent to the die. At least one support in the plurality of supports is positioned adjacent to at least one corner of the die such that the at least one corner of the die is positioned adjacent to the at least one support. Other example forms relate to a method of fabricating an electronic package. The method includes securing a die to a substrate and securing a plurality of supports to the substrate such that at least one support is adjacent to at least one corner of the die.

Electronic package with corner supports

Growing community of inventors

Chandler, AZ, United States of America

Manish Dubey