Ams Ag

Austriamicrosystems Ag

Ams International Ag

Manfred Lueger

Thomas Jessenig

Herbert Lenhard

Robert Kappel

Christian Mautner

Peter Trattler

Georg Roehrer

Holger Haiplik

Josef Kriebernegg

Kerry Glover

Mario Manninger

Christian Halper

Peter Bliem

Tobias Bühler

Yiming Jiang

Hesong Xu

Daniele Perenzoni

Tobias Buehler

Daniel Furrer

A time-to-digital converter circuit is disclosed, the time-to-digital converter circuit including a plurality of delay stages connected to form a delay line, a plurality of event counters, an encoder circuit for triggering the delay line, and a binning circuit for associating an event with an event counter from plurality of event counters. The binning circuit selects the event counter based on a signal from the delay line, and wherein the encoder circuit is configured to sequentially trigger a different delay stage of the plurality of delay stages. Also disclosed is a time-of-flight sensor implementing the time-to-digital converter circuit, and an associated apparatus and method.

Time-to-digital converter

A semiconductor body includes a driver for driving a light source, at least two detectors each including an avalanche diode, a time-to-digital converter arrangement coupled to outputs of the at least two detectors, a memory that is coupled to the time-to-digital converter arrangement and is configured to store at least one histogram, and an evaluation unit coupled to the driver and to the memory.

Measuring time-of-flight using a plurality of detector subsystems and histogram storage

A driving circuit () to generate a signal pulse for operating a light-emitting diode () comprises an external terminal (LEDK, LEDA) to connect the light-emitting diode () to the driving circuit (). In a first operating state/pre-charge state of the driving circuit (), a first controllable switching circuit () connects a first side () of a capacitor () to a reference potential (Vref) and a second controllable switch () connects a second side () of the capacitor () to one of a supply and ground potential (VDD, VSS). In a second operating state of the driving circuit (), the first controllable switching circuit () connects the first side () of the capacitor () to said one of the supply and ground potential (VDD, VSS) and the second controllable switch () connects the second side () of the capacitor () to the external terminal (LEDK, LEDA) to provide a signal pulse for operating the light emitting diode.

Driving circuit to generate a signal pulse for operating a light-emitting diode

A voltage converter includes a first to a third capacitor, a supply terminal, a first and a second clock terminal and a transfer arrangement, wherein a first electrode of the first capacitor is connected to the first clock terminal and a second electrode of the first capacitor is connected to a first node of the transfer arrangement, wherein a first electrode of the second capacitor is connected to the second clock terminal and a second electrode of the second capacitor is connected to a second node of the transfer arrangement, and wherein a first electrode of the third capacitor is permanently and directly connected to the second electrode of the first capacitor and a second electrode of the third capacitor is connected to a third node of the transfer arrangement.

Voltage converter and method for voltage conversion

A circuit for DC-DC conversion with current limitation comprises a DC-DC converter () with a coil () and a controllable switch () that can be switched into a low-impedance and a high-impedance state, and a current limiter () for generating a control signal (I) for controlling the state of the controllable switch in the DC-DC converter (). The current limiter () is constructed such that the current (I) through the coil at which the current limitation takes place is nearly independent of the ratio of the on-times and off-times of the controllable switch in the DC-DC converter ().

Circuit for DC-DC conversion with current limitation

An optical sensor arrangement () comprises a light sensor () that is connected to a summation node () and is designed for generating a sensor current (S), a current source (S) connected to the summation node () and designed to provide a source current (S), and an integrator () that is coupled to the summation node () and is designed for generating a first value (VP) of an integrator signal (S) by integrating during a first phase (P) and for generating a second value (VP) of the integrator signal (S) by integrating during a second phase (P). The optical sensor arrangement () comprises a sum and hold circuit () that is coupled to the integrator () and is designed to generate an analog output signal (S) as a function of a difference of the first value (VP) and the second value (VP) of the integrator signal (S).

Optical sensor arrangement and method for generating an analog output signal

A circuit arrangement () for voltage conversion comprises a forward branch () with a first load terminal () to which an electrical load () can be coupled and a feedback branch () with a sampling device (). The electrical load () can be operated with pulse width modulation. A method for voltage conversion comprises the following steps: an electrical load () is supplied with energy using pulse width modulation. A feedback voltage (Vfb) that can be tapped at a terminal of the electrical load () is sampled in a first clock phase during which the electrical load () is supplied with energy. The voltage conversion is controlled as a function of the feedback voltage (Vfb).

Circuit arrangement and method for voltage conversion

A circuit arrangement for supplying energy, comprising: a first input adapted to receive a first voltage from a first terminal of a control component, a second input adapted to receive a second voltage from a second terminal of the control component, a first output adapted to receive output a control signal to a control terminal of the control component for controlling an energy supply of an electrical load; and a power determining arrangement, comprising a switched-capacitor arrangement having an input coupled to the first and the second input of the circuit arrangement and an output coupled to the first output of the circuit arrangement.

Circuit arrangement for the supplying of energy from a power source to an electrical load

A circuit arrangement () comprises a circuit terminal () for supplying a data signal (DATA) having digital information, a logic circuit () that is coupled at an input () to the circuit terminal () for supplying the digital information, an activation circuit (), and a voltage regulator () that is coupled for activation to an output () of the activation circuit (). The activation circuit () comprises an input () that is coupled to the circuit terminal (), a delay element () that is coupled to the input () of the activation circuit (), and the output (), connected to the delay element (), for emitting an activation signal (SON).

Circuit arrangement and method for evaluating a data signal

An integrated circuit includes a comparator having a first input, a second input, and an output for providing a comparison result. The first input is connected to a readable component having a predefined value, and the second input is connected to a reference component. A control unit is at the output of the comparator. The control unit controls at least one function block based on the comparison result.

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Preding, Austria

Manfred Lueger