Motorola Corporation

Manbir Nag

Joseph P Heck

Scott R Humphreys

James G Mittel

John Wayne Simmons

John J Parkes, Jr

Kevin T McLaughlin

James Rodney Webster

A digital DC offset correction circuit ( ) provides DC offset correction within a receiver ( ) using an area-optimum, rapid acquisition cellular multi-protocol digital dc offset correction scheme. The digital DC offset correction circuit ( ) includes an integrator ( ), a low pass filter ( ), a decimator ( ), a digital to analog converter codeword clamp ( ), and a digital to analog converter ( ).

Area-optimum rapid acquisition cellular multi-protocol digital DC offset correction scheme

A digital demodulator ( ) includes a differentiate and cross multiply stage ( ) and a plurality of filter/decimator stages ( and and ) that accept both multiple baud rates and multiple modulation deviation frequencies, and that provide a common frequency data stream at their respective outputs. One of said filter/decimator stages is coupled to a primary filter ( ) which is followed by a box filter ( ). The box filter ( ) improves the overall filter response and provides notches at a specified frequency (e.g., 4800 Hz) and its harmonics. Demodulator ( ) provides improved sensitivity without the need for any circuit trimming. The filter stages (e.g., and ) used in demodulator ( ) have been optimized to eliminate the need for costly multipliers.

Digital demodulator using boxcar filters and boxcar filter sections

A ring inhibiting charging and discharging circuit (,) for use with an amplification circuit (,) that drives a load (,) is responsive to an input (,) and is capable of generating an output (,) corresponding to the input (,). The ring inhibiting charging and discharging circuit (,) includes a charge element (,) that is responsive to the output (,) from the amplification circuit (,). The charge element (,) is capable of charging the load when the input voltage is greater than a preselected multiple of the output voltage. A discharge circuit (,) is responsive to the output (,) from the amplification circuit (,) and includes a feedback circuit (,) and a staging circuit (,). The feedback circuit (,) asserts a difference signal when the output voltage is less than the preselected multiple of the input voltage. The staging circuit (,) is responsive to difference signal and gradually reduces the rate at which the load (,) is discharged over a preselected period of time once the difference signal indicates that the output voltage is within a preselected range of the input voltage.

High capacitance drive fast slewing amplifier

A voltage comparator (,) includes a differential amplifier (,), a switched latch (,), and a switch (,). The voltage comparator (,) receives a first input signal (,) and a second input signal (,), and produces a first output (,) and a second output (,) by comparing the first and second input signals. A reset input (,) disables and enables the voltage comparator (,).

Voltage comparator

A decoder circuit (21) and method for providing an amplitude compensated signal by removing the undesired effect of amplitude modulation on a phase modulated signal. The decoder method is provided by demodulating a received inphase receive signal component (10) and quadrature receive signal component (12) of the phase modulated signal and outputting an amplitude varying signal (15) to a feedforward automatic gain control circuit that outputs an amplitude compensated signal (38). The feedforward automatic gain control circuit comprises a detector circuit (16), an offset bias circuit (32), a differencer circuit (30) and a gain control circuit (28). The detector circuit (16) outputs a DC signal (17) representing an amplitude of the inphase receive signal (10) and the quadrature receive signal (12). The offset bias circuit (32) provides a constant current bias (29) to the DC signal (17) thus creating a control signal 31. The gain control circuit (28) receives the control signal (31) and the amplitude varying signal (15) and outputs an amplitude compensated signal (38).

Decoder circuit for phase modulated signals

A wide dynamic range Operational Transconductance Amplifier (OTA) (100) includes a differential voltage to current converter (206) for converting an input voltage to a current level. A pair of programmable folded cascodes (201) are coupled to the output of the converter (206) in order to render the amplifier (100) programmable. Current sources (222 and 226) are employed to provide output sourcing current. There is also included a common mode feedback (106) for maintaining the output signal substantially and equally centered between rails of the operating voltage (208).

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Coral Springs, FL, United States of America

Manbir Nag