Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Matsushita Electric Industrial Co., Ltd.

Communications Research Laboratory, Ministry of Posts and

Manabu Yanagihara

Tsuyoshi Tanaka

Yasuhiro Uemoto

Masahiro Hikita

Daisuke Ueda

Tetsuzo Ueda

Hiroto Yamagiwa

Hiroaki Ueno

Ayanori Ikoshi

Tatsuo Morita

Takahiro Sato

Kazushi Nakazawa

Hideyuki Okita

Hidetoshi Ishida

Masayuki Kuroda

Shingo Hashizume

Yutaka Hirose

Yorito Ota

Saichirou Kaneko

Masanori Inada

Takeshi Azuma

Kazuo Eda

Kenichiro Tanaka

Daisuke Shibata

Takeshi Kawabata

Mitsuru Tanabe

Toshinobu Matsuno

Yoshiharu Anda

Yoshihisa Minami

Daijiro Arisawa

Takahiro Ohori

Tetsuyuki Fukushima

Akihisa Sugimura

Atsushi Nakagawa

Katsumi Otani

Daisuke Yamamoto

Tomohiko Nakamura

Hidekazu Nakamura

Yusuke Katagiri

Manabu Inoue

Kaoru Inoue

Koji Takahashi

Shuichi Nagai

Nobuyuki Otsuka

Akiyoshi Tamura

Takeshi Harada

Yusuke Kinoshita

Katsunori Nishii

Hiroki Akashi

Keiichi Murayama

Naohiro Tsurumi

Yusuke Kanda

Takashi Uno

Toshiaki Matsui

Noboru Negoro

Tomoya Uda

Ryusuke Kanomata

Keiichi Matsunaga

Chikashi Hayashi

Satoshi Makioka

Takeshi Fukui

Takeya Okuno

Shinichi Oki

Tuyoshi Tanaka

Nobumitsu Hirose

A semiconductor device includes third active regions that connect two finger-end portions of field effect transistors (FETs) spaced apart from each other, and includes, above the third active regions, portions of a third nitride semiconductor layer that includes P-type impurities.

High voltage nitride semiconductor device

A semiconductor device includes: a substrate; a first nitride semiconductor layer above the substrate; a second nitride semiconductor layer above the first nitride semiconductor layer and being greater than the first nitride semiconductor layer in band gap; and a first field-effect transistor including a first source electrode, a first drain electrode, and a first gate electrode that are above the second nitride semiconductor layer, the first source electrode and the first drain electrode being separated from each other, the first gate electrode being disposed between the first source electrode and the first drain electrode. The first field-effect transistor includes a third semiconductor layer that is above the second nitride semiconductor layer in part of a region between lower part of the first source electrode and the first gate electrode, and is separated from the first gate electrode. The third semiconductor layer and the first source electrode are electrically connected.

Semiconductor device

A semiconductor device includes: a substrate; a first nitride semiconductor layer on the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer; finger-shaped source electrodes on the second nitride semiconductor layer; finger-shaped drain electrodes disposed so as to be spaced apart from the source electrodes; and finger-shaped gate electrodes respectively disposed between the source electrodes and the drain electrodes. The gate electrodes are electrically connected, via a first gate integrated wiring, a plurality of second gate integrated wirings and a third gate integrated wiring, to gate pads located on one or both ends of the third gate integrated wiring. A plurality of source pads and the plurality of second gate integrated wirings are formed alternately in a first direction perpendicular to the longitudinal direction of the gate electrodes.

Semiconductor device and semiconductor component including the same

A nitride semiconductor device includes a semiconductor layered structure including a substrate, a channel layer, and a barrier layer. The channel layer is formed above the substrate and made of a nitride semiconductor layer. The barrier layer is formed on the channel layer, has a wider band gap than the channel layer, and is made of a nitride semiconductor layer. The semiconductor layered structure includes an isolation region in which impurities are implanted. The position of an impurity concentration peak in the depth direction in the isolation region is deeper than the interface between the barrier layer and the channel layer. The concentration of the impurities at the interface between the barrier layer and the channel layer in the isolation region is lower than the concentration at the impurity concentration peak.

Nitride semiconductor device with suppressed leakage current and method of fabricating the same

A gate drive circuit that drives a switching element including a first drain, a first source, and a first gate includes: a first terminal to which a gate control signal is input; a gate signal line connecting the first terminal and the first gate; a resistance element inserted in the gate signal line; a capacitance element connected in parallel with the resistance element; a clamp circuit that performs a clamp operation of clamping a voltage between the first gate and the first source to a voltage lower than a threshold voltage of the switching element when the gate control signal indicates an off period of the switching element; and a clamp control circuit that controls whether to prohibit the clamp operation of the clamp circuit in the off period.

Gate drive circuit, gate drive device, high-frequency power supply device, and system

EMI noise is reduced and a component mounting area is suppressed, and downsizing of a power supply device is achieved. Power supply device includes transistor block, gate drive circuit block, and driver block. First gate terminal and second gate terminal are disposed on the same side as gate drive circuit block when viewed from a center of transistor block. Two output terminals are disposed on the same side as transistor block when viewed from a center of gate drive circuit block. At least a part of first drain terminal is included in a region sandwiched between first source terminal and second source terminal. Second drain terminal is disposed at a position deviating from an extension region that extends the region sandwiched between the first source terminal and the second source terminal beyond second source terminal as viewed from first drain terminal.

Power supply device, ACF converter, and AC adapter

The semiconductor device includes: a semiconductor substrate; a first transistor disposed above the semiconductor substrate and including a first source electrode, a first gate region, and a first drain electrode; and a second transistor disposed above the semiconductor substrate and including a second source electrode, a second gate region, and a second drain electrode. The first source electrode, the second gate region, and the second source electrode are substantially at an identical potential. The first drain electrode and the second drain electrode are substantially at an identical potential.

Semiconductor device including electrodes with identical potential

A semiconductor device that is a surface mount-type device includes a nitride semiconductor chip including a silicon substrate having a first thermal expansion coefficient and an InGaAlN layer in contact with a surface of the silicon substrate, where 0≤x≤1, 0≤y≤1, 0≤x+y≤1; and a die pad including Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient. A thickness of the nitride semiconductor chip is at least 0.2 mm, length L of the nitride semiconductor chip is at least 3.12 mm, and thickness tm of the die pad and length L of the nitride semiconductor chip satisfy tm≥2.00×10×L+0.173, tm being a thickness in mm and L being a length in mm.

Semiconductor device and method for manufacturing the same

An integrated semiconductor device includes an Si substrate, and a high-side transistor and a low-side transistor which configure a half-bridge. A source electrode of a unit transistor configuring the high-side transistor and a drain electrode of a unit transistor configuring the low-side transistor are integrated as a common electrode.

Integrated semiconductor device

A switching circuit includes: a normally-off junction field-effect GaN transistor including source, drain, and gate terminals; a drive device of one output type electrically connected to the gate terminal; a first rectifier, between the source terminal and the gate terminal, including an anode on a source terminal side and a cathode on a gate terminal side; a capacitor between a cathode side of the first rectifier and the drive device; a first resistor between the capacitor and the drive device; a second resistor, one side of the second resistor being connected to the drive device, another side of the second resistor being connected between the cathode side of the first rectifier and the capacitor; and a second rectifier including an anode on a capacitor side and a cathode on a drive device side. No resistor is provided between the cathode side of the second rectifier and the drive device.

Switching circuit

A semiconductor device includes a substrate; a first nitride semiconductor layer above the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer; an ohmic electrode above the substrate; and a contact layer in contact with at least a part of the ohmic electrode, the contact layer containing silicon and chlorine. The second nitride semiconductor layer has a wider band gap than the first nitride semiconductor layer. A two-dimensional electron gas channel is formed in the first nitride semiconductor layer at a heterointerface between the first nitride semiconductor layer and the second nitride semiconductor layer. A silicon concentration has a higher peak value than a chlorine concentration in the contact layer.

Semiconductor device and method of manufacturing the device

A semiconductor device that is a surface mount-type device includes a nitride semiconductor chip including a silicon substrate having a first thermal expansion coefficient and an InGaAlN layer in contact with a surface of the silicon substrate, where 0&#x2264;x&#x2264;1, 0&#x2264;y&#x2264;1, 0&#x2264;x+y&#x2264;1; and a die pad including Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient. A thickness of the nitride semiconductor chip is at least 0.2 mm, length L of the nitride semiconductor chip is at least 3.12 mm, and thickness tm of the die pad and length L of the nitride semiconductor chip satisfy tm&#x2265;2.00&#xd7;10&#xd7;L+0.173, tm being a thickness in mm and L being a length in mm.

A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer disposed above the substrate; a second nitride semiconductor layer disposed above the first nitride semiconductor layer and having a band gap larger than a band gap of the first nitride semiconductor layer; a third nitride semiconductor layer selectively disposed above the second nitride semiconductor layer and containing a p-type first impurity element; a high resistance region disposed in the third nitride semiconductor layer, the high resistance region containing a second impurity element and having a specific resistance higher than a specific resistance of the third nitride semiconductor layer; and a gate electrode disposed above the high resistance region, wherein an end of the high resistance region is inside a surface end of the third nitride semiconductor layer.

Nitride semiconductor device and method for manufacturing the same

A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer; a second nitride semiconductor layer having a greater band gap than the first nitride semiconductor layer; a source electrode and a drain electrode on the second nitride semiconductor layer apart from each other; a third nitride semiconductor layer, between the source electrode and the drain electrode, containing a p-type first impurity and serving as a gate; and a fourth nitride semiconductor layer, between the third nitride semiconductor layer and the drain electrode, containing a p-type second impurity, wherein the average carrier concentration of the fourth nitride semiconductor layer is lower than the average carrier concentration of the third nitride semiconductor layer.

Nitride semiconductor device and method for manufacturing same

A switching circuit includes; a switching element; a driver; a diode connected between a source terminal and a gate terminal of the switching element; a resistor connected between the driver and the gate terminal of the switching element; a series circuit connected in parallel with the resistor, and including a capacitor and a resistor; and a diode including an anode on a side of the gate terminal of the switching element and a cathode on a side of a second output terminal of the driver. The diode is connected in parallel with at least the capacitor out of the capacitor and the resistor connected in series.

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Osaka, Japan

Manabu Yanagihara