Semiconductor Energy Laboratory Co., Ltd.

Sharp Kabushiki Kaisha Corporation

Manabu Sato

Shunpei Yamazaki

Kenichi Okazaki

Shigeki Komori

Masatoshi Yokoyama

Hironori Matsumoto

Masataka Nakada

Hiroyuki Miyake

Junichi Koezuka

Toshinari Sasaki

Koji Kusunoki

Yoshifumi Tanada

Susumu Kawashima

Hidenori Mori

Masami Jintyou

Daisuke Kurosaki

Yoshinobu Asami

Takuya Matsuo

Shigeyasu Mori

Hiroshi Matsukizono

Yosuke Kanzaki

An inexpensive display device with a narrow bezel is provided. The display device includes a first pixel including a light-emitting device, a second pixel including a light-receiving device, and a reading circuit for reading data obtained by the second pixel. The reading circuit includes a first circuit included in a mounted IC chip and a second circuit monolithically formed over a substrate over which a pixel circuit is formed. With this structure, a circuit corresponding to the second circuit can be omitted from the IC chip, so that the IC chip can be downsized.

Display device and electronic device

A semiconductor device with high reliability is provided. The semiconductor device includes a first transistor, a second transistor, a capacitor, and first to fourth wirings. The first transistor includes a first gate and a second gate, and one of a source and a drain of the first transistor is connected to the first wiring and the second gate, and the other of the source and the drain is connected to one of a source and a drain of the second transistor and one electrode of the capacitor. A gate of the second transistor is connected to the other electrode of the capacitor, and the other of the source and the drain of the second transistor is electrically connected to the second wiring. The first wiring is supplied with a first potential, and the second wiring is supplied with a second potential and a third potential alternately. The third wiring is connected to the first gate and supplied with a first signal. The fourth wiring is connected to the gate of the second transistor and supplied with a second signal obtained by inverting the first signal.

Semiconductor device, display device, and electronic device

A highly reliable semiconductor device is provided. The semiconductor device includes first to third transistors and a capacitor. In the first transistor, one of a source and a drain is supplied with a first signal, the other of the source and the drain is connected to a gate of the second transistor and one electrode of the capacitor, and a gate is supplied with a second pulse signal. In the second transistor, one of a source and a drain is supplied with a first pulse signal, and the other of the source and the drain is connected to the other electrode of the capacitor and one of a source and a drain of the third transistor. In the third transistor, the other of the source and the drain is supplied with the first potential, and a gate is supplied with a second signal that is an inverted signal of the first signal. The first pulse signal is a clock signal, and the second pulse signal has a duty ratio of 55% or lower.

To suppress a variation in characteristics of a transistor due to a released gas from an organic insulating film so that reliability of a display device is increased. The display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components (a transparent conductive layer and an inorganic insulating film) of the capacitor, and a released gas from the organic insulating film can be released to the outside from exposed part of an upper surface of the organic insulating film.

Display device

A highly reliable semiconductor device in which a shift in threshold voltage of a transistor due to deterioration can be inhibited is provided. A pulse output circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor. A clock signal is supplied to a drain of the first transistor. A first power supply potential is applied to a source of the second transistor, and a drain of the second transistor is connected to the drain of the first transistor. A second power supply potential is applied to a drain of the third transistor. The first power supply potential is applied to a source of the fourth transistor, and a drain of the fourth transistor is connected to the drain of the third transistor. The first power supply potential is applied to a source of the fifth transistor, and a drain of the fifth transistor is connected to a gate of the third transistor. One of a source and a drain of the sixth transistor is connected to the drain of the first transistor, and the other of the source and the drain of the sixth transistor is connected to the gate of the third transistor. The first transistor and the third transistor include back gates connected to each other. The first to sixth transistors have the same conductivity type.

Pulse output circuit and semiconductor device

Growing community of inventors

Tochigi, Japan

Manabu Sato