Fujitsu Corporation

Manabu Nakano

Masaru Sawada

Koji Horibe

Hideaki Tanishima

Tsunehiko Moriuchi

Kenichi Yamakura

Tsuyoshi Tomita

Yoshitaka Nakata

Fumiaki Uematsu

Hiroko Murakami

Kazuyoshi Kikuta

A backup system which can improve reliability of data without sacrificing availability of a data processing system and a duplicating apparatus employed in the backup system. The backup system includes a duplicating apparatus for taking in data in the transfer of the data and codes from a host apparatus to a storage apparatus and holding the data as duplicated data, the duplicating apparatus including a code fetching unit to fetch the codes and hold the fetched codes as duplicated codes, and a data verifying unit to verify existence or nonexistence of an error in the data by comparing the taken data and the duplicated data.

Backup system and duplicating apparatus

An interface converter for functionally connecting external devices having interfaces complying with different standards. The interface converter includes a USB-ATAPI command converter and a USB-ATA command converter. A switching controller checks the type of the interface of each external device and activates one of the command converters in accordance with the result of the checking.

Interface converter having switching ability

A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.

Signal processor having feedback loop control for decision feedback equalizer

A digital arithmetic operation circuit includes a plurality of arithmetic operation blocks, a control signal generator and a selector. The plurality of arithmetic operation blocks receive a plurality of digital input signals and perform different arithmetic operations on the received digital input signals, in parallel, to output operation result signals. The a control signal generator receives a plurality of digital input signals and generates a control signal based on the digital input signals. The selector selects one of the operation result signals, in response to the control signal, to output the selected operation result signal. After the control signal generator supplies the control signal to the selector, the selector outputs the selected operation result signal as soon as the selected operation result signal is supplied to the selector.

Semiconductor integrated circuit device

Growing community of inventors

Kasugai, Japan

Manabu Nakano