Fujitsu Corporation

Fujitsu Semiconductor Limited

Manabu Kojima

Kenichi Goto

Kenichi Okabe

Hiroshi Morioka

Naoshi Higaki

A semiconductor device having a semiconductor substrate, a first impurity region including a first conductive impurity formed in the semiconductor substrate, a first transistor and a second transistor formed in the first impurity region, a first stress film and a second stress having a first stress over the first transistor a and the second transistor, and a third stress film having a second stress different from the first stress provided in the first impurity region between the first stress film and the second stress film.

Semiconductor device and manufacturing method thereof

A gate insulator film and a gate electrode are formed on a semiconductor substrate, and then a layered stack of a SiOfilm and a SiN film is formed on the entire surface. Subsequently, sidewalls made of polysilicon film are formed adjacent to the gate electrode via the layered stack of the SiOfilm and the SiN film. Then, using as a mask the gate electrode, portions of the layered stack adjacent to the gate electrode, and the sidewalls, an ion dopant is implanted into a device active region to thereby form source/drains therein, and the sidewalls are then removed. At this stage, since the gate insulator film is completely covered with the layered stack, the gate insulator film is not ablated or retreated even on a device isolation insulator film.

Method for manufacturing semiconductor device

A method of manufacturing a CMOS semiconductor device able to reduce the effective thickness of the gate insulating film and able to secure stable performance is provided. The method in one embodiment comprises the steps of: forming a polycrystalline silicon film on a gate insulating film; introducing an n-type impurity into the polycrystalline silicon film in an nMOS formation region before gate processing of the polycrystalline silicon film; performing heat treatment so that the impurity diffuses in the polycrystalline silicon film and is activated; and patterning the polycrystalline silicon to form a gate pattern before introducing an impurity into the polycrystalline silicon film at a pMOS formation region.

Method of manufacturing CMOS semiconductor device

A lateral bipolar transistor includes an insulating substrate, a single crystal semiconductor layer having a first conductivity, a mask layer which has a substantially vertical side surface and which is in contact with the single crystal semiconductor layer, and an insulating sidewall formed along the side surface of the mask layer. A base region is located under the insulating sidewall and formed in the single crystal semiconductor layer. The base region has a second conductivity opposite to the first conductivity and contains an impurity implanted by an ion implantation process. The single crystal semiconductor layer has an underlying portion on which the mask layer and the insulating sidewall are formed. An emitter region is formed in a first portion of the single crystal semiconductor layer other than the underlying portion. A collector region is formed in a second portion of the single crystal semiconductor layer other than the underlying portion.

Growing community of inventors

Kawasaki, Japan

Manabu Kojima