Sandisk Technologies Inc.

Mitsubishi Petrochemical Company Limited

Manabu Hayashi

Tetsuya Yamada

Mitsutaka Miyabayashi

Akira Nakada

Michiaki Sano

Seje Takaki

Kengo Kajiwara

Ryousuke Itou

Takuro Maede

Akio Nishida

Hiroshi Yui

Zhen Chen

Mitsumasa Kaitoh

Sung Tae Lee

Takashi Matsubara

Eiki Yasukawa

Yusuke Oda

Kikuko Miyata

Yasuke Oda

Shigenori Sato

A wedge-shaped contact region can be employed to provide electrical contacts to multiple electrically conductive layers in a three-dimensional device structure. A cavity including a generally wedge-shaped region and a primary region is formed in a dielectric matrix layer over a support structure. An alternating stack of insulating layers and electrically conductive layers is formed by a series of conformal deposition processes in the cavity and over the dielectric matrix layer. The alternating stack can be planarized employing the top surface of the dielectric matrix layer as a stopping layer. A tip portion of each electrically conductive layer within remaining portions of the alternating stack is laterally offset from the tip of the generally wedge-shaped region by a respective lateral offset distance along a lateral protrusion direction. Contact via structures can be formed on the tip portions of the electrically conductive layers to provide electrical contact.

Three-dimensional devices with wedge-shaped contact region and method of making thereof

A method is provided that includes forming a transistor by forming a gate disposed in a first direction above a substrate, the gate including a first bridge portion and a second bridge portion, forming the first bridge portion extending in the first direction and disposed near a top of the gate, and forming the second bridge portion extending in the first direction and disposed near a bottom of the gate.

Vertical thin film transistors with surround gates

A method is provided that includes forming a dielectric material above a substrate, forming a hole in the dielectric material, the hole disposed in a first direction, forming a word line layer above the substrate via the hole, the word line layer disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material on a sidewall of the hole, forming a local bit line in the hole, and forming a memory cell including the nonvolatile memory material at an intersection of the local bit line and the word line layer.

Methods and apparatus for vertical bit line structures in three-dimensional nonvolatile memory

A method is provided that includes forming a transistor by forming a first a rail gate disposed in a first direction above a substrate, forming a second rail gate disposed in a second direction above the substrate, the second direction perpendicular to the first direction, and forming a bridge section disposed between the first rail gate and the second rail gate.

Electrode for secondary battery

Disclosed is an electrode for secondary battery, which comprises an alkali metal as the active substance carried on a carrier composed of

Disclosed is an electrode for secondary battery, which comprises lithium or an alkali metal composed mainly of lithium doped as the active substance in a carrier composed of a mixture of a carbonaceous material satisfying the following conditions (A) and an organic polymer having ion conductivity of lithium. (A) a carbonaceous material with a hydrogen/carbon (H/C) atomic ratio of less than 0.15, a spacing (d.sub.002) of the (002) plane according to the X-ray wide angle diffraction method of 3.37 to 3.75 .ANG. and a crystallite size in the c-axis direction (Lc) of 5 .ANG. or more.

Growing community of inventors

Yokkaichi, Japan

Manabu Hayashi