The Hong Kong University of Science and Technology

Chinese Academy of Sciences

Man Yu Wong

Hoi Sing Kwok

Zhiguo Meng

Kevin Chau

Xiuling Zhu

Jiaxin Sun

Fan Zeng

Yiming Zhang

Hoi-Sing Kwok

Shueng Han Gary Chan

Shuyun Zhao

Dongli Zhang

Yeuk Lung Jacob Ho

Wei Zhou

Meng Zhang

Guijun Li

Shuming Chen

Zhi Ye

The present invention provides a signal fusion system that is a probabilistic system fusing an arbitrary combination of heterogeneous signals for determining the location of electronic devices. The system includes a signal sampling device for detecting one or more signals emitted by an electronic device to be located, including geolocation signals, WiFi signals, Bluetooth signals, 4G communication signals, 5G communication signals, geomagnetism signals, or inertial navigation system signals (INS). A likelihood processor cooperates with the signal sampling device to receive information about selected sampled signals, and creates a grid of reference points for an interested area in which the electronic device may be located. The likelihood processor independently computes, for each selected sampled signal, a location likelihood that is a probability of observing the sampled signal given that the electronic device is located at different reference points in the grid.

Generic signal fusion framework for multi-modal localization

The present invention is related to a sensor. In particular, the present invention is related to a pressure sensor die and its fabrication process. The pressure sensor comprises a chamber inside which a pressure sensor die is provided. The pressure sensor die is uniformly compressed by the external pressure to be measured and can deform freely inside the chamber. The pressure sensor die is primarily constructed of single crystalline silicon and comprises a substrate and a cap connected together. A recess is formed on the cap. The recess forms a sealed cavity with the substrate. A silicon oxide layer is formed between the substrate and the cap. The substrate further comprises a plurality of piezoresistive sensing elements which are located inside the sealed cavity. The present pressure sensor is more immune to temperature effects. It is especially suitable for operating in a high temperature, high pressure environment and is capable of delivering accurate and reliable pressure measurements at low cost.

Pressure gauge chip and manufacturing process thereof

A pressure sensor die especially suitable for high-temperature, high-pressure operating environment and delivering accurate and reliable pressure measurement at low cost. A single crystalline silicon includes a cap, a substrate and a base connected together. A recess formed on the cap creates an upper sealed cavity with the substrate. A silicon oxide layer is formed between the substrate and the cap. A recess formed on the base creates a lower sealed cavity with the substrate. The upper sealed cavity and the lower sealed cavity overlap in their projections. The substrate includes at least two sets of piezoresistive sensing elements located within the overlapping projections, perpendicular to each other, and oriented in different crystallographic directions.

Method of making a dual-cavity pressure sensor die

Dual-cavity pressure sensor die and the method of making same

The present invention is related to a sensor. In particular, the present invention is related to a MEMS strain gauge die and its fabrication process. The MEMS strain gauge die comprises a handle, a device layer and a cap all connected together. A silicon oxide layer is formed between the handle and the device layer. Another silicon oxide layer is formed between the device layer and the cap. Recesses are respectively formed on the handle and the cap and face each other. The handle recess and the cap recess are connected to form a cavity. The device layer, which spans the cavity, further comprises a bridge on which a plurality of piezoresistive sensing elements are formed. The present strain gauge die is more immune to temperature effects. It is especially suitable for operating in a high temperature environment and is capable of delivering accurate and reliable strain measurements at low cost.

MEMS strain gauge sensor and manufacturing method

The present invention relates to a MEMS pressure sensor die and its fabrication process. The pressure sensor comprises a chamber inside which a MEMS pressure sensor die is provided. The pressure sensor die comprises a handle, a device layer and a cap all connected together. A silicon oxide layer is formed between the handle and the device layer. Another silicon oxide layer is formed between the device layer and the cap. Recesses are respectively formed on the handle and the cap and face each other. The handle recess and the cap recess are connected to form a cavity. The device layer, which spans the cavity, further comprises a bridge on which a plurality of piezoresistive sensing elements are formed. The present pressure sensor is more immune to temperature effects. It is especially suitable for operating in a high temperature, high pressure environment and is capable of delivering accurate and reliable pressure measurements at low cost.

MEMS pressure gauge sensor and manufacturing method

A method of fabricating a hybrid organic-inorganic halide perovskite film includes depositing a precursor layer onto a substrate, the precursor layer comprising metal halide, placing an organic source-material layer onto a boat, the organic source-material layer comprising an organic cation, and annealing the precursor layer and the organic source-material layer in a vacuum chamber enclosed in a constrained volume.

Organic-inorganic perovskite materials and optoelectronic devices fabricated by close space sublimation

A solar cell photovoltaic device using ultrathin films of polycrystalline silicon and deep uneven surface structures is disclosed. According to one embodiment, the uneven structures include one or more pits having a depth of at least 10 microns. According to another embodiment, the uneven structures include one or more cones or columns having a height or at least 10 microns. Because the unevenness of the structures, the photovoltaic device is able to use a very thin layer of polycrystalline silicon to effectively trap and absorb light.

Ultrathin film multi-crystalline photovoltaic device

A thin film transistor includes: a source region; a drain region; and a polycrystalline thin film active channel region connected to the source region and the drain region, the active channel region comprising grains and being doped with a two-dimensional pattern comprising a plurality of doped regions, the plurality of doped regions each comprising at least portions of a plurality of the grains and at least one grain boundary.

Thin film transistor with two-dimensional doping array

A thin-film transistor with a fluorinated channel and fluorinated source and drain regions and methods of fabrication are provided. The thin-film transistor includes: a substrate; a semiconductor active layer of fluorine-doped metal-oxide formed on the substrate; fluorine-doped source and drain regions disposed adjacent to the semiconductor active layer; a gate electrode disposed over the semiconductor active layer, configured to induce a continuous conduction channel between the source and drain regions; and a gate dielectric material separating the gate electrode and the channel.

Metal-oxide based thin-film transistors with fluorinated active layer

The present invention provides a method of an active-matrix thin film transistor array, comprising of two levels of metallic interconnections formed from one layer of metallic conductor; and thin-film transistors with source, drain and gate electrodes either fully or partially replaced with metal, and wherein the pixel electrodes are polycrystalline silicon.

Method for fabrication of active-matrix display panels

Described herein is a microchannel that is formed beneath and parallel to a surface of a silicon substrate. Silicon migration technology is utilized to form a microchannel that is buried beneath the surface of the silicon substrate. Etching opens at least one end of the microchannel. Oxidization is utilized through the open end of the microchannel to facilitate a controlled diameter of the microchannel.

Oxide microchannel with controllable diameter

A low temperature polycrystalline silicon device and techniques to manufacture thereof with excellent performance. Employing doped poly-Si lines which we called a bridged-grain structure (BG), the intrinsic or lightly doped channel is separated into multiple regions. A single gate covering the entire active channel including the doped lines is still used to control the current flow. Using this BG poly-Si as an active layer and making sure the TFT is designed so that the current flows perpendicularly to the parallel lines of grains, grain boundary effects can be reduced.

Polycrystalline silicon thin film transistors with bridged-grain structures

Metal induced polycrystallized silicon is used as the anode in a light emitting device, such as an OLED or AMOLED. The polycrystallized silicon is sufficiently non-absorptive, transparent and made sufficiently conductive for this purpose. A thin film transistor can be formed onto the polycrystallized silicon anode, with the silicon anode acting as the drain of the thin film transistor, thereby simplifying production.

Polycrystalline silicon as an electrode for a light emitting diode and method of making the same

The construction of electrodes for liquid-crystal displays using larger grain lower absorption (LGLA) poly-Si showing an absorptivity below 20% in the visible light region is described. Integration in the manufacturing of substrates for active-matrix LCDs is shown. Source, drain and channel region () of the TFTs as well as the pixel-electrode () are formed conjointly in a single poly-Si layer.

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Hong Kong, China

Man Yu Wong