United Microelectronics Corp.

Man-Ling Lu

Yi-Wei Chen

Chung-Fu Chang

Yen-Liang Wu

Chia-Jong Liu

Wen-Jiun Shen

Ssu-I Fu

Yu-Hsiang Hung

Jhen-Cyuan Li

Yu-Cheng Tung

Shui-Yen Lu

Sheng-Hsu Liu

Chih-Chung Chen

Chung-Min Tsai

I-Fan Chang

A fin-shaped structure includes a substrate having a first fin-shaped structure located in a first area and a second fin-shaped structure located in a second area, wherein the second fin-shaped structure includes a ladder-shaped cross-sectional profile part. The present invention also provides two methods of forming this fin-shaped structure. In one case, a substrate having a first fin-shaped structure and a second fin-shaped structure is provided. A treatment process is performed to modify an external surface of the top of the second fin-shaped structure, thereby forming a modified part. A removing process is performed to remove the modified part through a high removing selectivity to the first fin-shaped structure and the second fin-shaped structure, and the modified part, thereby the second fin-shaped structure having a ladder-shaped cross-sectional profile part is formed.

Method of forming fin-shaped structure

A method of forming a semiconductor device is provided. At least one stacked structure is provided on a substrate. A first spacer material layer, a second spacer material layer, and a third spacer material layer are sequentially formed on the substrate and cover the stacked structure. The first, second, and third spacer material layers are etched to form a tri-layer spacer structure on the sidewall of the stacked structure. The tri-layer spacer structure includes, from one side of the stacked structure, a first spacer, a second spacer, and a third spacer, and a dielectric constant of the second spacer is less than each of a dielectric constant of the first spacer and a dielectric constant of the third spacer.

Method of forming semiconductor device

Method of forming fin-shaped structure having ladder-shaped cross-sectional profile

A fin structure for a semiconductor device, such as a FinFET structure, has first and second semiconductor layers and an air gap between the layers. The second semiconductor layer includes a recessed portion, the air gap is located in the recessed portion, and the recessed portion has an upwardly-opening acute angle in the range from about 10&#xb0; to about 55&#xb0;. The air gap may prevent current leakage. A FinFET device may be manufactured by first recessing and then epitaxially re-growing a source/drain fin, with the regrowth starting over a tubular air gap.

Bottom-up epitaxy growth on air-gap buffer

Semiconductor device and method of forming the same

An etching method adapted to forming grooves in Si-substrate and FinFET transistor manufactured thereof are provided. The etching method includes providing a silicon substrate, at least two gate structures formed on the silicon substrate and at least two gate spacer structures disposed on the silicon substrate; performing a first etching process on the silicon substrate to form a first groove, which has a base and two inclined sidewalls, ascending to respective bottoms of the gate structures, and are interconnected with the base, respectively; and performing a second etching process on the silicon substrate at the base of the first groove, so as to form a second groove in a trench shape, wherein the two inclined sidewalls of the first groove are interconnected with the second groove respectively, and the first etching process is substantially different from the second etching process.

Fin field-effect transistor

The present invention provides a semiconductor structure, comprising a substrate, a gate structure, a source/drain region and at least a dislocation. The gate structure is disposed on the substrate. The source/drain region is disposed in the substrate at two sides of the gate structure. The dislocation is located in the source/drain region, and is asymmetrical relating to a middle axis of the source/drain region.

Semiconductor structure

Fin-shaped structure and manufacturing method thereof

A fin structure for a semiconductor device, such as a FinFET structure, has first and second semiconductor layers and an air gap between the layers. The air gap may prevent current leakage. A FinFET device may be manufactured by first recessing and then epitaxially re-growing a source/drain fin, with the regrowth starting over a tubular air gap.

A semiconductor device includes a substrate, a gate structure, a sidewall spacer, and an epitaxial layer. The gate structure is disposed on the substrate, and the substrate has at least one recess disposed adjacent to the gate structure. The sidewall spacer is disposed on at least two sides of the gate structure. The sidewall spacer includes a first spacer layer and a second spacer layer, and the first spacer layer is disposed between the gate structure and the second spacer layer. The epitaxial layer is disposed in the recess, and the recess is a circular shaped recess. A distance between an upmost part of the recess and the gate structure is less than a width of the sidewall spacer.

Semiconductor device

A field effect transistor (FinFET) device includes a substrate, a fin structure, a shallow trench isolation and a gate structure. The fin structure is formed on a surface of the substrate and includes a base fin structure and an epitaxial fin structure formed on the base fin structure. The shallow trench isolation structure is formed on the surface of the substrate and includes a peripheral zone and a concave zone. The peripheral zone physically contacts with the fin structure. The gate structure is disposed on the epitaxial fin structure perpendicularly. A method of fabricating the aforementioned field effect transistor is also provided.

Fin field effect transistor device and fabrication method thereof

A fabrication method of a semiconductor structure includes the following steps. First of all, a gate structure is provided on a substrate, and a first material layer is formed on the substrate and the gate structure. Next, boron dopant is implanted to the substrate, at two sides of the gate structure, to form a first doped region, and P type conductive dopant is implanted to the substrate, at the two sides of the gate structure, to form a second doped region. As following, a second material layer is formed on the first material layer. Finally, the second material layer, the first material layer and the substrate at the two sides of the gate structure are etched sequentially, and a recess is formed in the substrate, at the two sides of the gate structure, wherein the recess is positioned within the first doped region.

Fabrication method of semiconductor structure

A FINFET structure is provided. The FINFET structure includes a substrate, a PMOS element, a NMOS element, a STI structure, and a bump structure. The substrate includes a first area and a second area adjacent to the first area. The PMOS element is disposed in the first area of the substrate, and includes at least one first fin structure. The NMOS element is disposed in the second area of the substrate and includes at least one second fin structure. The STI structure is disposed between the first fin structure and the second fin structure. The bump structure is disposed on the STI structure and has a carbon-containing dielectric material.

FINFET structure

An etching method adapted to forming grooves in Si-substrate and FinFET transistor manufactured thereof are provided. The etching method includes providing a silicon substrate, at least two gate structures formed on the silicon substrate and at least two gate spacer structures disposed on the silicon substrate; performing a first etching process on the silicon substrate to form a first groove, which has a base and two inclined sidewalls, ascending to respective bottoms of the gate structures, and are interconnected with the base, respectively; and performing a second etching process on the silicon substrate at the base of the first groove, so as to form a second groove in an inverted-symbol shape, wherein the two inclined sidewalls of the first groove are interconnected with the second groove respectively, and the first etching process is substantially different from the second etching process.

Etching method for forming grooves in Si-substrate and fin field-effect transistor

A semiconductor device includes a fin structure, an insulating structure, a protruding structure, an epitaxial structure, and a gate structure. The fin structure and the insulating structure are disposed on the substrate. The protruding structure is in direct contact with the substrate and partially protrudes from the insulating structure, and the protruding structure is the fin structure. The epitaxial structure is disposed on a top surface of the fin structure and completely covers the top surface of the fin structure. In addition, the epitaxial structure has a curved top surface. The gate structure covers the fin structure and the epitaxial structure.

Growing community of inventors

Taoyuan County, Taiwan

Man-Ling Lu