Skhynix Inc.

Man Keun Kang

Geun Ho Choi

Myung Kyun Kwak

Eun Hyup Doh

Sang Kwon Lee

Saeng Hwan Kim

Chul Moon Jung

Mi Hyun Hwang

A memory includes: a data receiving circuit suitable for receiving a data during a write operation; a data rotation circuit suitable for changing an order of the data transferred from the data receiving circuit and outputting the data whose order is changed in response to an address during the write operation; an error correction code generation circuit suitable for generating an error correction code based on the data output from the data rotation circuit during the write operation; and a memory core suitable for storing the data received by the data receiving circuit and the error correction code during the write operation.

Error correction of memory

A semiconductor system includes a semiconductor device suitable for not performing an internal refresh operation when entering a self-refresh mode in response to a self-refresh command, and cutting off input of an auto-refresh command when exiting the self-refresh mode.

Semiconductor device and semiconductor system

A driving signal control circuit includes a discharge circuit, a counter circuit, and a control circuit. The discharge circuit is configured to compare a monitored voltage and a reference voltage, and generate a discharge signal. The monitored voltage is proportional to a core voltage. The counter circuit is configured to perform an up/down count operation according to the discharge signal, and generate a count signal. The control circuit is configured to generate a driving signal which has an enable period proportional to the count signal.

Driving signal control circuit and driving apparatus

A semiconductor device includes a decoded signal generation circuit suitable for executing a counting operation to generate a decoded signal in response to an oscillation signal during a refresh section, a refresh pulse generation circuit suitable for generating a refresh pulse for executing a refresh operation in response to the decoded signal and a temperature code, and a reset pulse generation circuit suitable for generating a reset pulse initializing the decoded signal in response to the refresh pulse.

Semiconductor device configured to generate a refresh pulse for executing a refresh operation in response to the decoded count signal and temperature code

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Seongnam-si, South Korea

Man Keun Kang