Qualcomm Incorporated

Mamta Desai

Dhamim Packer Ali

Ashutosh Shrivastava

Yanru Li

Azzedine Touzni

Rudhresh Kumar

Santan Kumar

Thirupathi Venkatarajan

A method of improving synchronization over a secure digital (SD) bus between an SD host and an SD client device is described. The method includes writing to a client event register to interrupt the SD host for an SD extended command. The method also includes triggering the SD host to issue the SD extended command to the SD client device over the SD bus in response to the SD client device writing to the client event register.

SDIO chip-to-chip interconnect protocol extension for slow devices and power savings

Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of operating a system-on-chip (SoC). The method includes selecting a CPU core of a plurality of CPU cores of the SoC to boot the SoC based on information indicative of the quality of the plurality of CPU cores stored on the SoC. The method includes running boot code on the selected CPU.

Selectable boot CPU

Systems and methods are disclosed for providing stack overflow protection on a system on chip via a hardware write-once register. An exemplary embodiment of an system on chip comprises a hardware write-once register, a boot processor, and one or more processor subsystems. The boot processor is configured to execute a read only memory (ROM) image which initializes the hardware write-once register with a first numeric value in response to the system on chip being powered on. The one or more processor subsystems have an associated software image configured to use the first numeric value in the hardware write-once register as a stack canary value to combat stack overflow attacks.

Secure stack overflow protection via a hardware write-once register

Growing community of inventors

San Diego, CA, United States of America

Mamta Desai