Mitsubishi Electric Corporation

Renesas Electronics Corporation

Asahi Glass Company, Limited

Mamoru Terai

Takuya Hagiwara

Hiroya Ikuta

Takashi Nishimura

Toshiaki Shinohara

Yoshiyuki Nakaki

Shiori Idaka

Kenichi Hayashi

Minoru Sato

Takeo Ishibashi

Kei Yamamoto

Michio Murai

Masaru Takada

Hiroshi Kigawa

Hideharu Nobutoki

Tatsuo Ota

Seiki Hiramatsu

Yoko Takebe

Rikio Kondo

Osamu Yokokoji

Yoshiyuki Suehiro

Muneaki Mukuda

Hajime Sotokawa

Hiroyuki Nakagawa

Atsushi Mitsui

Tetsu Negishi

Shinya Naito

Yasumitsu Nomura

Miwako Ishibashi, Legal Representative

Takumi Oho

A semiconductor device includes: a semiconductor element which includes semiconductor substrate, an insulating film formed on a front surface of the semiconductor substrate and having an opening, and an electrode formed in the opening on the front surface of the semiconductor substrate; and a first protective film disposed to cover the semiconductor element. The insulating film has a thickness of not less than 1/500 of a thickness of the semiconductor substrate and not more than 4 &#x3bc;m. The insulating film has a compressive stress per film thickness of not less than 100 MPa/&#x3bc;m.

Semiconductor device

A plurality of semiconductor devices provided on a silicon carbide substrate are provided with electrode layers, respectively. The silicon carbide substrate is cut at a region of an exposed surface of the silicon carbide substrate that separates the electrode layers to individually separate the semiconductor devices. A stress relaxation resin is applied to each individually separated semiconductor device to cover the exposed surface at a peripheral end portion of that surface of the semiconductor device which has the electrode layer thereon. A semiconductor apparatus can thus be obtained that also allows a semiconductor device with a silicon carbide or similar compound semiconductor substrate to adhere to a sealant resin via large adhesive strength and thus allows the sealant resin to be less crackable, less peelable and the like by thermal stress caused in operation.

Semiconductor apparatus and method for producing the same

A plurality of semiconductor elements for power control are formed on a semiconductor substrate. A stress relaxation resin layer covering a crossing region where band-shaped dicing areas dividing the semiconductor elements adjacent to each other cross is formed. The crossing region is diced to cut the stress relaxation resin layer to obtain the separate semiconductor elements. Accordingly, even with semiconductor elements produced with a compound semiconductor substrate of SiC or the like, a semiconductor device having high adhesive strength with a sealing resin and being less likely to cause cracking or peeling of the sealing resin due to thermal stress during an operation can be obtained.

Semiconductor device and method of manufacturing the same

A power semiconductor device is provided with a semiconductor-element substrate in which a front-surface electrode pattern is formed on a surface of an insulating substrate; semiconductor elements for electric power which are affixed to the surface of the front-surface electrode pattern; a partition wall which is provided on the front-surface electrode pattern so as to enclose the semiconductor elements for electric power; a first sealing resin member which is filled inside the partition wall; a second sealing resin member which covers the first sealing resin member and a part of the semiconductor-element substrate which is exposed from the partition wall, wherein an electrode for a relay terminal is provided on a surface of the partition wall, and a wiring from inside of the partition wall to outside of the partition wall is led out via the electrode for a relay terminal.

Power semiconductor device

A semiconductor device includes: a semiconductor-element substrate in which a front-surface electrode pattern is formed on a surface of an insulating substrate and a back-surface electrode is formed on another surface; semiconductor elements affixed to the surface of the front-surface electrode pattern opposite the insulating substrate; and a sealing resin member which covers the semiconductor element and the semiconductor-element substrate, wherein at a position of the front-surface electrode pattern where the position has potential equivalent to that of the front-surface electrode pattern at a position where a semiconductor element is bonded, an insulating terminal table formed with a conductive relay terminal and an insulating member that insulates the relay terminal and the front-surface electrode pattern from each other are provided, and wiring from the semiconductor element to the outside is led out via the relay terminal.

Semiconductor device with an insulating terminal table

A semiconductor device includes a semiconductor element substrate, wherein an electrode pattern is formed on one surface of an insulating substrate and a back-surface electrode is formed on the other surface of the insulating substrate; a stress-relaxation adhesive layer made of resin that covers at least a part of a portion of the surface of the insulating substrate where the electrode pattern and the back-surface electrode are not formed; and a semiconductor element affixed, using a bonding material, to the surface of the electrode pattern opposite the insulating substrate, and a first sealing resin member which covers the semiconductor element and the semiconductor element substrate, and a modulus of elasticity of the stress-relaxation adhesive layer is lower than that of the first sealing resin member.

Semiconductor device and method for manufacturing semiconductor device

A developing method for immersion lithography is provided, realizing a process that is simple and low-cost and enables high repellency sufficient to allow high-speed scanning. The developing method for immersion lithography improved by inexpensive material without introducing any new facility, a solution to be used in the developing method, and an electronic device formed by using the developing method are provided. The developing method for immersion lithography is a method of developing for immersion lithography of an electronic device with a resist containing a surface segregation agent and chemically-amplified resist, including the step of development with alkali immersion, characterized by the dissolving and removing step, conducted using a dissolving and removing solution that selectively dissolves and removes the surface segregation agent of the resist.

Developing method for immersion lithography, solvent used for the developing method and electronic device using the developing method

A power module according to the present invention is a power module configured such that a power device chip is arranged within an outer casing and an electrode of the power device chip is connected to an external electrode that is integrated with the outer casing. The power module includes: a heat spreader fixed inside the outer casing; the power device chip solder-bonded on the heat spreader; an insulating dam formed on the heat spreader so as to surround the power device chip; and an internal main electrode having one end thereof solder-bonded to the electrode of the power device chip and the other end thereof fixed to an upper surface of the dam. The external electrode and the other end of the internal main electrode are electrically connected to each other by wire bonding.

Power module

An elevator rope including a rope main body; and a covering resin layer that covers the periphery of the rope main body and comprises a molded product of a composition which composition is produced by mixing a thermoplastic polyurethane elastomer, a thermoplastic resin other than the thermoplastic polyurethane elastomer and an isocyanate compound having two or more isocyanate groups per molecule; a rope main body impregnated with an impregnating solution comprising a hydroxy compound having two or more hydroxy groups per molecule and an isocyanate compound having two or more isocyanate groups per molecule and having a lower viscosity than a melt viscosity of the composition for forming the covering resin layer is used as the rope main body; the elevator rope has a stable friction coefficient that does not depend on temperature or sliding velocity.

Elevator rope

The present invention relates to a method of forming a resist pattern for obtaining an electronic device in which a development defect is eliminated, and aims at providing a process that is simple and low-cost, and can impart a high hydrophobicity capable of high-speed scan. It relates to a method of forming a resist pattern including the steps of: providing immersion exposure to a resist film; solubilizing the resist film subjected to the immersion exposure in an alkaline developer; developing the resist film solubilized in the alkaline developer by alkali immersion; and performing a deionized water rinse treatment on the developed resist film in this order, wherein the step of solubilization in the alkaline developer is performed by exposing the resist film subjected to the immersion exposure to ozone gas without irradiating ultraviolet rays (hereinafter, sometimes referred to as ozone treatment).

Method of forming resist pattern

It is an object of the present invention to provide a water repellant composition for a substrate to be exposed which inhibits the back side of a substrate to be exposed from being contaminated by an immersion liquid, can improve adhesion between a film to be processed and an organic film directly overlying that film to inhibit film peeling, and has excellent workability, a method for forming a resist pattern, an electronic device produced by the formation method, a treatment method for imparting water repellency to a substrate to be exposed, a water repellent set for a substrate to be exposed, and a treatment method for imparting water repellency to a substrate to be exposed using the same. A water repellent composition for a substrate to be exposed including at least an organosilicon compound represented by the following general formula (1) and a solvent is used.  In the formula, Ris a monovalent organic group having 14 to 30 carbon atoms, each R, R, and Ris independently a monovalent organic group or a hydrolyzable group having 1 to 10 carbon atoms, and at least one of R, R, and Ris a hydrolyzable group.

Water repellant composition for substrate to be exposed, method for forming resist pattern, electronic device produced by the formation method, treatment method for imparting water repellency to substrate to be exposed, water repellant set for substrate to be exposed, and treatment method for imparting water repellency to substrate to be exposed using the same

Growing community of inventors

Tokyo, Japan

Mamoru Terai