Toppan Printing Co., Ltd.

Mamoru Ishizaki

Ryohei Matsubara

Manabu Ito

Masato Kon

Jun Sasaki

Takehito Tsukamoto

Norimasa Sekine

Osamu Kina

Hatsune Hara

Shinichi Inoue

Eiichi Kitazume

Takeshi Itoi

Yuichi Ito

Takao Minato

Teruhiko Kai

Mizuhiro Tani

Takehisa Takada

Kaoru Hatta

Yifan Qian

Tomoko Tsuruda

Hina Chujo

A thin-film transistor array includes an insulating substrate and pixels each including a thin-film transistor, a pixel electrode, and a capacitor electrode, the pixels being formed in a matrix and located at positions where column wirings extending in a column direction intersect row wirings perpendicular to the column wirings and extending in a row direction. The thin-film transistor includes a gate electrode, a source electrode, a drain electrode, and a semiconductor pattern formed between the source electrode and the drain electrode. The pixel electrode includes two electrically conductive layers which are a lower layer electrode serving as a lower pixel electrode, and an upper layer electrode serving as an upper pixel electrode. The corresponding one of the column wirings is at a position which has no overlap with the capacitor electrode and the lower pixel electrode, and has an overlap with the upper pixel electrode, in the lamination direction.

Thin-film transistor array and method of producing the same

A reflective display apparatus including a reflective display portion which is two-dimensionally divided into pixels each having subpixels and changes reflectance of each subpixel based on an image signal, and colored layers facing the reflective display portion and partially overlapping the pixels as viewed in a facing direction in which the colored layers face the reflective display portion. The colored layers include traversing colored layers that overlap more than one of the subpixels as viewed in the facing direction, and the colored layers are positioned such that at most one of the colored layers overlaps one of the subpixels as viewed in the facing direction.

Reflective display apparatus

A thin-film transistor array including an insulating substrate, a gate insulating film sandwiched between a first structure and a second structure, the first structure including a gate electrode, a gate wire connected to the gate electrode, a capacitor electrode, and a capacitor wire connected to the capacitor electrode, and the second structure including a source electrode, a source wire connected to the source electrode, a drain electrode, and a pixel electrode connected to the drain electrode, a resistor inserted between parts of the capacitor wire, and a semiconductor layer formed between the source electrode and the drain electrode. The pixel electrode is positioned over the capacitor electrode with the gate insulating film positioned therebetween and has a storage capacitance, and the source electrode and the drain electrode are positioned over the gate electrode with the gate insulating film positioned therebetween.

Thin-film transistor array, image display device, and method for manufacturing thin-film transistor array

A display device including a pair of substrates having surfaces facing each other and electrodes formed on the surfaces, respectively, a display medium having a memory effect and formed between the pair of substrates, and a drive unit that applies a drive voltage to the display medium. The display medium includes charged particles encapsulated therein such that movement of the charged particles based on a voltage applied by the drive unit provides display, and the charged particles include first particles for displaying a first color with application of a first voltage, second particles for displaying a second color with application of a second voltage having a polarity different from a polarity of the first voltage, and third particles for displaying a third color with application of a third voltage which has the same polarity as the polarity of the first voltage and an absolute value smaller than an absolute value of the first voltage.

Display device and driving method

A thin-film transistor array including an insulating substrate, gate lines formed on the insulating substrate, source lines formed on the insulating substrate, and transistors each being formed on the insulating substrate at a position corresponding to a respective intersection of the gate lines and the source lines, and formed in a matrix including pixels in rows and columns, each of the transistors including a gate electrode connected to each of the gate lines, a source electrode connected to each of the source lines, a drain electrode, and a pixel electrode connected to the drain electrode. Each of the source lines is connected to a column of pixels, and each of the gate lines includes a first portion connected to a predetermined number of pixels in a row and a second portion connected to pixels in an adjacent row.

Thin-film transistor array and method for manufacturing the same

A thin film transistor array formed substrate including a gate electrode, a gate insulation layer, a source wiring structure including a source wiring and a source electrode, a drain electrode, a pixel electrode connected to the drain electrode, a semiconductor layer formed in a stripe shape having a longitudinal side extending in a direction that the source wiring extends, and a protection layer formed to cover an entire portion of the semiconductor layer. The source wiring structure has notch portions positioned in the direction that the source wiring extends such that the notch portions overlap with the gate electrode, the source wiring has a first portion having a first width where the notch portions are formed and a second portion having a second width larger than the first width where no notch portions are formed, and the source wiring has an opening in the second portion.

Thin film transistor array formed substrate, image display device substrate and manufacturing method of thin film transistor array formed substrate

A thin-film transistor array includes thin-film transistors each including an insulating substrate which is formed with a gate electrode, a gate wiring, a capacitor electrode and a capacitor wiring. A source electrode and a drain electrode having a gap therebetween and including a semiconductor pattern are formed, in a region overlapping with the gate electrode on the substrate via a gate insulator, with the semiconductor pattern being covered with a protective layer. Two such TFTs are independently formed for each pixel. In each pixel, two source electrodes are separately connected to two respective source wirings, and two drain electrodes are connected to an electrode of the pixel via individual drain-connecting electrodes. The array includes source-connecting electrodes each connecting between the source electrodes of the two TFTs formed for each pixel. The same drive waveform is applied to the two source wirings.

Thin-film transistor array, fabrication method therefor, image display device and display method

A thin film transistor array including a gate wiring connected to a gate electrode and extended in a first direction, a source wiring connected to a source electrode, a drain electrode having a gap from the source electrode, a semiconductor pattern formed at least in a portion corresponding to the gap between the source and drain electrodes, the semiconductor pattern having a region defined by extending the portion in a second direction perpendicular to the first direction, and a pixel electrode that overlaps with a capacitor electrode in the planar view. In the planar view, the drain electrode has a shape of a single line, the source electrode has a first portion in a line shape and a second portion in a sheath shape surrounding the drain electrode and keeping a space from the drain electrode, and the source wiring is narrower than the region of the semiconductor pattern.

Thin film transistor array

A layered structure includes a first electrode layer on an insulating substrate, a first insulating film on the first electrode layer, a second electrode layer on the first insulating film, a second insulating film on the second electrode layer, and a third electrode layer on the second insulating film. The first electrode layer, an opening of the first insulating film, the second electrode layer, an opening of the second insulating film, and the third electrode layer have a stack structure that causes the first electrode layer and the second electrode layer to be connected. The third electrode layer relays or reinforces, through the opening of the second insulating film, a connection between the first electrode layer and the second electrode layer formed on the first insulating film.

Layered structure, thin film transistor array, and method of manufacturing the same

In a thin-film transistor array according to an embodiment of the present invention, thin-film transistors are disposed in a matrix array, the thin-film transistor including a gate electrode that is formed on a substrate, a gate insulating layer that is formed on the gate electrode, a source electrode that is formed on the gate insulating layer, a pixel electrode that is formed on the gate insulating layer, a drain electrode that is connected to the pixel electrode, and a semiconductor layer that is formed between the source electrode and the drain electrode, the gate electrode is connected to a gate line while the source electrode is connected to a source line, the thin-film transistor is formed within a region of the source line and the thin-film transistor array includes a stripe insulating film such that the source line and the semiconductor layer are covered with the stripe insulating film.

Thin-film transistor array and image display device in which thin-film transistor array is used

One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.

Thin film transistor array, method for manufacturing the same, and active matrix type display using the same

One embodiment of the present invention is a thin film transistor, including: an insulating substrate; a gate electrode and a gate insulator being formed on the insulating substrate, in this order; a source electrode and a drain electrode formed on the gate insulator, surface preparation of the source electrode and the drain electrode being performed with a compound having a functional group with an electron-withdrawing property; and a semiconductor film formed on the gate insulator, the film being formed between the source electrode and the drain electrode.

Thin film transistor and method for manufacturing the same

One embodiment of the present invention is a color EL display characterized in that at least color filters, a thin film transistor circuit, an organic EL layer, and a common electrode are laminated in this order on a transparent substrate. Another embodiment of the invention is a method for producing a color EL display comprising the steps of forming color filters on a transparent substrate; forming a thin film transistor circuit; forming an organic EL layer; and forming a common electrode, wherein a process temperatures of the steps of forming the thin film transistor circuit and subsequent steps are 200&#xb0; C. or less.

Color EL display and method for producing the same

One embodiment of the present invention is a thin film transistor having a gate electrode formed on an insulating substrate, a gate wire connected to the gate electrode, a capacitor electrode, a capacitor wire connected to the capacitor electrode, a gate insulator formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulator, a sealing layer formed on the oxide semiconductor pattern, a drain electrode and a source electrode formed on the sealing layer, a drain wire connected to the drain electrode and a pixel electrode connected to the source electrode, the drain wire and the pixel electrode being in the same layer as the drain electrode and the source electrode. Wherein the gate wire, the capacitor electrode and the capacitor wire are in the same layer as the gate electrode, and wherein the sealing layer does not cover a connection part of the source electrode and a connection part of the drain electrode and wherein the drain electrode and the source electrode are connected to the oxide semiconductor pattern via the connection part of the drain electrode and the connection part of the source electrode.

Growing community of inventors

Tokyo, Japan

Mamoru Ishizaki