Sanyo Electric Co., Ltd.

Mamoru Arimoto

Kaori Misawa

Kazuhiro Sasada

Ryu Shimizu

Hayato Nakashima

Atsuhiro Nishida

Takayuki Kaida

Hiroyuki Aoe

Shoji Sudo

Hideharu Nagasawa

Yosifumi Matusita

Tatsurou Geshi

An image sensor includes a charge storage portion for storing and transferring signal charges, a first electrode for forming an electric field storing the signal charges in the charge storage portion, a charge increasing portion for increasing the signal charges stored in the charge storage portion and a second electrode for forming another electric field increasing the signal charges in the charge increasing portion, wherein the quantity of the signal charges storable in the charge storage portion is not less than the quantity of the signal charges storable in the charge increasing portion.

Image sensor and sensor unit

A solid-state image sensor capable of suppressing blooming and increase of a dark current also when an n-type impurity concentration in a transfer channel region is increased is obtained. In this solid-state image sensor, gate electrodes of a prescribed pixel and another pixel adjacent to the prescribed pixel are provided at a first space, and a larger quantity of second conductivity type impurity is introduced into a region of a first conductivity type transfer channel region, located on the main surface of a substrate, corresponding to the first space as compared with a second conductivity type impurity contained in the remaining region of the transfer channel region other than the region corresponding to the first space.

Solid-state image sensor

A plurality of source/drain regions are formed on a surface of a silicon substrate at a prescribed space. Floating gate electrodes are formed on sides of a channel region closer to the source/drain regions respectively through a first insulator film. Projections are formed on peripheral edge portions of the floating gate electrodes respectively. A control gate electrode is formed over the channel region and the floating gate electrodes through a second insulator film. The control gate electrode is opposed to the floating gate electrodes at one surface through the second insulator film.

Transistor, semiconductor memory and method of fabricating the same

A pair of source/drain regions are formed on a semiconductor substrate at a predetermined interval. A gate insulator film is formed on the semiconductor substrate between the source/drain regions of the pair. A gate electrode is formed on the gate insulator film. A film for covering the gate electrode and the source/drain regions has a low permeability against water and a hydroxide group, and has a thickness greater than 3 nm and less than 5 nm.

Semiconductor device with film covering

Growing community of inventors

Ogaki, Japan

Mamoru Arimoto