Nxp Usa, Inc.

Freescale Semiconductor,inc.

Mali Mahalingam

Lakshminarayan Viswanathan

Jaynal Abedin Molla

Mahesh K Shah

David F Abdo

Colby Greg Rampley

Brian W Condie

Carl Emil D'Acosta

An embodiment of a semiconductor die includes a base semiconductor substrate and an electrically conductive through substrate via (TSV) extending between the surfaces of the base semiconductor substrate. The bottom surface of the base semiconductor substrate includes a recessed region proximate to the TSV so that an end of the TSV protrudes from the bottom surface, and so that the TSV sidewall has an exposed portion at the protruding end of the TSV. Back metal, consisting of one or more metallic layers, is deposited on the bottom surface of the base semiconductor substrate and in contact with the TSV. The back metal can include a gold layer, a sintered metallic layer, and/or a plurality of other conductive layers. The die may be attached to a substrate using solder, another sintered metallic layer, or other materials.

Semiconductor devices with protruding conductive vias and methods of making such devices

Air cavity packages and methods for producing air cavity packages containing sintered bonded components, multipart window frames, and/or other unique structural features are disclosed. In one embodiment, a method for fabricating an air cavity package includes the step or process of forming a first metal particle-containing precursor layer between a base flange and a window frame positioned over the base flange. A second metal particle-containing precursor layer is further formed between the base flange and a microelectronic device positioned over the base flange. The metal particle-containing precursor layers are sintered substantially concurrently at a maximum processing temperature less than melt point(s) of metal particles within the layers to produce a first sintered bond layer from the first precursor layer joining the window frame to the base flange and to produce a second sintered bond layer from the second precursor layer joining the microelectronic device to the base flange.

Air cavity packages and methods for the production thereof

Structure and method are provided for plastic encapsulated semiconductor devices having reduced package cross-talk and loss. Semiconductor die are first coated with a buffer region having a lower dielectric constant &#x3b5; and/or lower loss tangent &#x3b4; than the plastic encapsulation. The encapsulation surrounds the buffer region providing a solid structure. The lower &#x3b5; buffer region reduces the stray capacitance and therefore the cross-talk between electrodes on or coupled to the die. The lower &#x3b4; buffer region reduces the parasitic loss in the encapsulation. Low &#x3b5; and/or &#x3b4; buffer regions can be achieved using low density organic and/or inorganic materials. Another way is to disperse hollow microspheres or other fillers in the buffer region. An optional sealing layer formed between the buffer region and the encapsulation can mitigate any buffer layer porosity. The buffer region desirably has &#x3b5; less than about 3.0 and/or &#x3b4; less than about 0.005.

Semiconductor device with reduced package cross-talk and loss

Growing community of inventors

Scottsdale, AZ, United States of America

Mali Mahalingam