International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

Malcolm Scott Ware

Gordon Taylor Davis

Hua Ye

Freeman Leigh Rawson, Iii

Karthick Rajamani

Dongming Hwang

Jeffrey Haskell Derby

Youssef Abdelilah

Ajay Dholakia

Michael Stephen Floyd

Charles Robert Lefurgy

Fredy Daniel Neeser

Heather Lynn Hanson

Andrew J Geissler

Hye-Young McCreary

Evangelos Stavros Eleftheriou

Wesley Michael Felter

Andreas Bieswanger

Clark Debs Jeffries

Thomas M Brey

Soraya Ghiasi

Elmootazbellah Nabil Elnozahy

John Bruce Carter

Juan C Rubio

William G Crouse

Sedat Oelcer

Sumeet Kochar

Christopher Landon Wood

Richard Edward Matick

Jaime Humberto Moreno

Donald E Carmon

Charles Robert Young

Freeman L Rawson

Guy L Guthrie

Jeffrey A Stuecheli

Guillermo Jesus Silva

Dhruv Manmohandas Desai

Raymond J Harrington

Gary Roy Shippy

Michael Joseph Steinmetz

Carl A Morrell

Michael Leo Scollard

Nickolas John Gruendler

Ryuji Orita

Robert John Schule

Pradip Bose

Naresh Nayar

Bartholomew Blaner

Wei T Huang

Gregory Scott Still

Patrick Kevin Egan

Srinivasan Ramani

Ken Van Vu

Norman Karl James

Steven Paul Hartman

James Lyle Peterson

Tejas S Karkhanis

Joshua D Friedrich

Joseph Franklin Garvey

Harold Wayne Chase

Youseff Abdelilah

Robert F H Fischer

Giovanni Cherubini

Randal Craig Swanberg

William J Rooney

Jon Alfred Casey

Vijay A Kumar

Peter Bergersen Yocom

Roger Donell Weekly

K Paul Muller

Richard Loise Arndt

Alan J Drake

Gottfried Ungerboeck

Todd Jon Rosedahl

Daniel J Kearney

Emmanuel Yashchin

Yoav Medan

Thomas W Keller, Jr

Mark Anthony Rinaldi

Kenneth Charles Marston

Bishop Chapman Brock

Everett Arthur Corl, Jr

Keith Manders Campbell

Joseph Edward Bolan

Peter Altevogt

Jennifer V Muncy

Scott J Hadderman

Uzi Shvadron

Christopher Francois

William W Lawton

Anthony N Hylick

Hans Boettiger

Fetchi Chen

Jose A Eduartez

Raymond W Weeks

Charles R Knox

Gary G Allran

Richard L Willaman

Jack T Murray

Nathan A Mitchell

A partition that is executed by multiple processing nodes. Each node includes multiple cores and each of the cores has a frequency that can be set. A first frequency range is provided to the cores. Each core, when executing the identified partition, sets its frequency within the first frequency range. Frequency metrics are gathered from the cores running the partition by the nodes. The gathered frequency metrics are received and analyzed by a hypervisor that determines a second frequency range to use for the partition, with the second frequency range being different from the first frequency range. The second frequency range is provided to the cores at the nodes executing the identified partition. When the cores execute the identified partition, they use a frequencies within the second frequency range.

Partition level power management using fully asynchronous cores with software that has limited asynchronous support

A method, system, and computer program product for reducing power and energy consumption in a server system with multiple processor cores is disclosed. The system may include an operating system for scheduling user workloads among a processor pool. The processor pool may include active licensed processor cores and inactive unlicensed processor cores. The method and computer program product may reduce power and energy consumption by including steps and sets of instructions activating spare cores and adjusting the operating frequency of processor cores, including the newly activated spare cores to provide equivalent computing resources as the original licensed cores operating at a specified clock frequency.

Method of exploiting spare processors to reduce energy consumption

A method, computer program product, and apparatus for managing power management in a data processing system are presented. A core is activated and configured to operate at a frequency in response to a request to increase a processing capacity. A determination whether a use of power resulting from activating the core meets a policy for the use of the power is made. A set of parameters is adjusted to meet the policy for the use of power in response to a determination that the use of power does not meet the policy. A determination whether a number of operations performed by a set of cores is made. An indication that the request to increase the processing capacity is unavailable is made in response to the number of operations having not increased.

Power management for processing capacity upgrade on demand

A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system.

Priority-based power capping in data processing systems

A method for a framework for scheduling tasks in a multi-core processor or multiprocessor system is provided in the illustrative embodiments. A thread is selected according to an order in a scheduling discipline, the thread being a thread of an application executing in the data processing system, the thread forming the leader thread in a bundle of threads. A value of a core attribute in a set of core attributes is determined according to a corresponding thread attribute in a set of thread attributes associated with the leader thread. A determination is made whether a second thread can be added to the bundle such that the bundle including the second thread will satisfy a policy. If the determining is affirmative, the second thread is added to the bundle. The bundle is scheduled for execution using a core of the multi-core processor.

Framework for scheduling multicore processors

A method to reduce large temperature over/undershoot in a computer system. Using workload data, the method proactively modifies controls of mechanical cooling system to anticipate power and take appropriate actions to maintain temperature. Workload control modifies workload and scheduling to reduce power transients and subsequent temperature deviations. In addition, workload control allows more even distribution of temp across chips, allowing for even wear and reduction of small/ripple/noise temp oscillations. A system and program product for carrying out the method are also provided.

Proactive cooling of chips using workload information and controls

A mechanism is provided for scheduling application tasks. A scheduler receives a task that identifies a desired frequency and a desired maximum number of competing hardware threads. The scheduler determines whether a user preference designates either maximization of performance or minimization of energy consumption. Responsive to the user preference designating the performance, the scheduler determines whether there is an idle processor core in a plurality of processor cores available. Responsive to no idle processor being available, the scheduler identifies a subset of processor cores having a smallest load coefficient. From the subset of processor cores, the scheduler determines whether there is at least one processor core that matches desired parameters of the task. Responsive to at least one processor core matching the desired parameters of the task, the scheduler assigns the task to one of the at least one processor core that matches the desired parameters.

Optimizing energy consumption and application performance in a multi-core multi-threaded processor system

An apparatus for providing memory energy accounting within a data processing system having multiple chiplets is disclosed. The apparatus includes a system memory, a memory access collection module, a memory throttle counter, and a memory credit accounting module. The memory access collection module receives a first set of signals from a first cache memory within a chiplet and a second set of signals from a second cache memory within the chiplet. The memory credit accounting module tracks the usage of the system memory on a per user basis according to the results of cache accesses extracted from the first and second set of signals from the first and second cache memories within the chiplet.

Method and apparatus for supporting memory usage accounting

Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state ('p-state') of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor.

Managing power consumption of a computer

An apparatus for providing system memory usage throttling within a data processing system having multiple chiplets is disclosed. The apparatus includes a system memory, a memory access collection module, a memory credit accounting module and a memory throttle counter. The memory access collection module receives a first set of signals from a first cache memory within a chiplet and a second set of signals from a second cache memory within the chiplet. The memory credit accounting module tracks the usage of the system memory on a per user virtual partition basis according to the results of cache accesses extracted from the first and second set of signals from the first and second cache memories within the chiplet. The memory throttle counter for provides a throttle control signal to prevent any access to the system memory when the system memory usage has exceeded a predetermined value.

Method and apparatus for supporting memory usage throttling

During manufacture, an operating range for dynamic voltage and frequency scaling can be established. A nominal operating point is identified based on a design nominal operating frequency for a computer processor. The nominal operating point comprises a nominal operating voltage identified for the design nominal operating frequency. In dependence upon the nominal operating point, an operating range of frequency and voltage over which the computer processor is to function is determined. Information specifying the nominal operating point and the operating range is stored in non-volatile storage associated with the computer processor.

Establishing an operating range for dynamic frequency and voltage scaling

A method, computer program product, and apparatus for managing power in a data processing system are presented. A core is activated in the data processing system and configured to operate at a frequency in response to receiving a request to increase a processing capacity of a set of resources in the data processing system. A determination whether a use of power resulting from activating the core configured to operate at the frequency meets a policy for the use of the power in the data processing system is made. A set of parameters associated with devices in the set of resources are adjusted to meet the policy for the use of power in the data processing system in response to a determination that the use of power does not meet the policy. A determination whether a number of operations performed per unit of time by a set of cores associated with the set of resources increased after activating the core is made. An indication that the request to increase the processing capacity of the set of resources is unavailable is made in response to a determination that the number of operations performed per unit of time by the set of cores associated with the set of resources has not increased.

A technique for performing storage power management on storage subsystems includes measuring, using a power measurement device, power consumption of a storage subsystem. A first average power and a second average power for the storage subsystem are calculated based on the measured power consumption. In this case, the first average power is calculated over a shorter time period than the second average power. One or more first actuators are incremented in response to the first average power of the storage subsystem being greater than a first power level to reduce the first average power of the storage subsystem below the first power level within a first time period. One or more second actuators are incremented in response to the second average power of the storage subsystem being greater than a second power level and less than the first power level to reduce the second average power of the storage subsystem below the second power level within a second time period that is greater than the first time period. Finally, one or more of the first actuators and the second actuators are decremented in response to the second average power of the storage subsystem being more than an offset below the second power level to increase the power consumption of the storage subsystem.

Techniques for performing storage power management

Growing community of inventors

Austin, TX, United States of America

Malcolm Scott Ware