Mitsui Chemicals, Inc.

Seiko Instruments Inc

Sii Semiconductor Corporation

Ablic Inc.

Mutsui Chemicals, Inc.

Seiko Instrumants Inc.

Makoto Mitani

Terunori Fujita

Junji Saito

Kotaro Watanabe

Shigekazu Matsui

Naoto Matsukawa

Kazutaka Tsuru

Toshiyuki Tsutsui

Masatoshi Nitabaru

Norio Kashiwa

Yasushi Tohi

Yoshiho Sonobe

Shinichi Kojoh

Yasushi Nakayama

Yasunori Yoshida

Mamoru Takahashi

Takashi Nakano

Haruyuki Makio

Seiichi Ishii

Hideki Bando

Kiyoaki Sugi

Tomoaki Matsugi

Tetsuhiro Matsumoto

Shiro Otsuzuki

Tetsuji Kasai

Junichi Mohri

Hidetsugu Tanaka

Fumiyasu Utsunomiya

Sadahiko Matsuura

Kenji Michiue

Masaya Murata

Keiji Okada

Yasuo Sato

Koji Endo

Kenichi Morizono

Shingo Matsuo

Yasuhiko Suzuki

Hideyuki Kaneko

Hideki Hirano

Yukihiro Takagi

Kenji Iwamasa

Takeshi Karino

Yasuo Satoh

Masao Suzuki

Susumu Murata

Daisuke Tanifuji

Chiaki Tomata

Hironori Hayashida

Sei-ichi Ishii

Keiko Takahashi

Hideki Bandoh

Sei-Ichi Ishii

To obtain a booster circuit capable of reducing voltage stress applied to a booster cell, provided is a booster circuit including a plurality of booster cells connected in series. Each of the plurality of booster cells includes a charge transfer transistor connected between an input terminal and an output terminal, and a boost capacitor connected between the input terminal and a clock terminal. Among the plurality of booster cells, a plurality of booster cells at least in a last stage are connected in parallel so that the plurality of booster cells connected in parallel are connected to a booster cell in a previous stage of the last stage by switching the plurality of booster cells in the last stage in accordance with a boosting operation.

Booster circuit and non-volatile memory including the same

To provide a voltage detection circuit in which the influence on a detection voltage by semiconductor manufacturing variations is small and which is small in current consumption. A voltage detection circuit is provided which detects a voltage, based on an output signal of a detection circuit and outputs a detection signal. The detection circuit includes a first MOS transistor unit which allows a first current to flow, a second MOS transistor unit which allows a second current to flow, and a current voltage conversion unit which converts each of the first current and the second current into a voltage and outputs the same as the detection signal. A voltage characteristic of the first current and a voltage characteristic of the second current are configured so as to be crossed with each other at a predetermined voltage.

Voltage detection circuit

Provided are a constant voltage circuit configured to, when a power supply voltage is low, detect a leakage current to output a stable voltage at a power supply voltage level, and a crystal oscillation circuit using the constant voltage circuit. The constant voltage circuit includes a leakage current detection circuit including a PMOS transistor for monitoring a leakage current, which has a gate and a source being grounded. When a leakage current is detected, even with a constant voltage power supply, a voltage sufficient for turning on an output transistor of the constant voltage circuit can be applied to a gate of the output transistor.

Constant voltage circuit and oscillation device

To provide a crystal oscillation circuit low in current consumption and stably short in oscillation start time. A crystal oscillation circuit is equipped with a crystal vibrator, a feedback resistor, a bias circuit, a constant voltage circuit, and an oscillation inverter configured by a constant current inverter. The oscillation inverter is configured so as to be controlled by currents based on input signals from the bias circuit and the crystal vibrator and driven by an output voltage of the constant voltage circuit.

Crystal oscillation circuit and electronic timepiece

There is provided a nonvolatile memory device having a writing error preventing function with high noise resistance. This structure includes a switch and a noise filter circuit connected in parallel to a clock terminal, wherein a clock pulse monitoring circuit compares the number of clocks input from the clock terminal with a prescribed number, and when detecting abnormality in the number of clocks, switches to a noise countermeasure mode in which the switch is turned off to validate the noise filter circuit.

Nonvolatile memory device

Provided is a data readout circuit capable of, even when a high voltage is applied during data read-out operation, preventing erroneous writing of the data and reading out the data correctly. The data readout circuit includes: a non-volatile storage element; a latch circuit including: an input inverter; an output inverter; and a MOS transistor; a first MOS transistor connected between the non-volatile storage element and the latch circuit; a second MOS transistor connected between the latch circuit and the first power supply terminal; a first bias circuit configured to bias a gate of the first MOS transistor; and a second bias circuit configured to bias the MOS transistor in the latch circuit, each of the first bias circuit and the second bias circuit being configured to output a predetermined bias voltage when the data in the non-volatile storage element is read out.

Data readout circuit of a storage device for read-out operation for preventing erroneous writing into a data storage element and reading out of the data correctly

The present invention provides a data reading device capable of preventing erroneous writing during an operation of reading data from a non-volatile memory element. The data reading device includes a dummy reading circuit provided with a non-volatile memory element, the writing voltage of which is lower than that of a non-volatile memory element of a data reading circuit, and a state detection circuit that detects a written state of the non-volatile memory element of the dummy reading circuit. Upon detection of erroneous writing to the non-volatile memory element of the dummy reading circuit during a data reading operation, the data reading operation is immediately terminated.

Data reading device and semiconductor device

The semiconductor device includes the charging system including: electric power generating unit for supplying electric power; electric power storing unit for storing electric power generated by the electric power generating unit; switch unit provided in a charging path for charging the electric power storing unit with the electric power generated by the electric power generating unit; a comparator driven by the electric power generated by the electric power generating unit for comparing a reference voltage and a stored voltage of the electric power storing unit; and a level converter provided between the comparator and the switch unit for, based on a result of a comparison made by the comparator, converting a level of a generated voltage to a level of the stored voltage and outputting a resultant signal to the switch unit.

Semiconductor device including charging system

To provide an analog electronic timepiece which prevents a crystal oscillation circuit from malfunctioning even if a battery voltage is lowered at motor loading. An analog electronic timepiece is equipped with a crystal vibrator, an oscillation circuit, a frequency division circuit, a constant voltage circuit, an output control circuit, and a motor. The analog electronic timepiece is configured in such a manner that the constant voltage circuit has a voltage holding circuit connected between a gate of an output transistor and a power supply terminal, and the oscillation circuit and the frequency division circuit are operated with a constant voltage generated by the constant voltage circuit as a power supply.

Analog electronic timepiece

There are provided a constant voltage circuit that features low current consumption and stable operation, and an analog electronic clock provided with the constant voltage circuit. The constant voltage circuit includes a differential amplifier circuit which is turned on/off by a predetermined signal and which controls the voltage of a gate of an output transistor on the basis of a reference voltage and a feedback voltage that are received, a switch circuit which is connected to an output terminal of the differential amplifier circuit and which is turned on/off by a predetermined signal, and a voltage holding circuit which is connected between the gate of the output transistor and a power supply terminal and which has a resistor and a capacitor connected in series. An analog electronic clock provided with the foregoing constant voltage circuit that supplies a voltage to at least an oscillation circuit and a frequency division circuit.

Constant voltage circuit and analog electronic clock

Provided is a readout circuit capable of detecting inversion of retained data caused by a noise, such as static electricity. The readout circuit is configured to retain opposing data in a first latch circuit and a second latch circuit in a readout period so as to be capable of detecting an anomaly of the retained data by making use of the fact that the data in the first latch circuit and the second latch circuit are inverted in the same direction due to a noise, such as static electricity.

Readout circuit and semiconductor device

Provided is an oscillation stop detection circuit having low current consumption, which is capable of detecting stop of oscillation regardless of whether an input signal stops at High or Low and thereby accurately measuring an oscillation stop detection period. The oscillation stop detection circuit includes: a pulse generation circuit for outputting a one-shot pulse in synchronization with an oscillation signal input from an input terminal; a capacitor including one terminal connected to a first power supply terminal and another terminal connected to an output terminal; a constant current circuit connected between the first power supply terminal and the another terminal of the capacitor; and a switch circuit connected between an output terminal of the pulse generation circuit and the another terminal of the capacitor, for connecting the another terminal of the capacitor to a second power supply terminal based on the one-shot pulse.

Oscillation stop detection circuit and electronic device

There are provided a constant voltage circuit that outputs a stable constant voltage for an analog electronic clock, and an analog electronic clock featuring low current consumption and prolonged battery life. The constant voltage circuit has a first voltage holding circuit connected between the gate of an output transistor and an output terminal and a second voltage holding circuit connected between the gate of the output transistor and a ground terminal, and carries out control such that the second voltage holding circuit is enabled when the motor is operated.

There is disclosed a data reading device in which data of a nonvolatile storage element is reflected in a circuit to be regulated, with a minimum necessary delay width after turning a power on or after reset cancellation, and wrong writing due to a static electricity is prevented. A delay circuit is additionally disposed to output a delayed data reading signal after a signal of turning the power on or a signal of the reset cancellation is generated. A delay time Tand a static electricity convergence time Tare set so as to keep a relation of TT

Data reading device

Provided is an overcharge prevention circuit for clamping a voltage value of an electric power generation unit in an overcharged state to a constant value, in which the number of elements is small and which does not consume electric power unnecessarily. The overcharge prevention circuit includes: a backflow prevention diode; a clamping transistor having a gate connected to a cathode of the backflow prevention diode, a source connected to an anode thereof, and a drain connected to an overcharge prevention switch. Upon detection of overcharge, a current is discharged via the clamping transistor and the overcharge prevention switch, thereby clamping a potential of the electric power generation unit to around a voltage of an electricity storage unit.

Overcharge prevention circuit and semiconductor device

Growing community of inventors

Chiba, Japan

Makoto Mitani