Nec Corporation

Makoto Iuchi

Hidemitsu Aoki

Yasushi Sasaki

Yuji Shimizu

Hiroshi Kitajima

Makoto Morita

Kaori Watanabe

Yoshimi Shiramizu

Hirofumi Seo

Masaharu Nakamori

Nahomi Ohta

Haruto Hamano

Programming of a plurality of mask ROMs having a common structure and formed on a semiconductor wafer is effected by an ion implantation for adjusting the threshold voltage of the memory transistors. The mask ROMs on the wafer is grouped in a plurality of groups arranged in point-symmetry or axisymmetry. During forming a photoresist pattern for each of the mask ROMs, a common alignment offset is assigned to the photoresist patterns of the mask ROMs in each group in the location of opening for ion implantation. Ion implantation is effected to the mask ROMs by using the photoresist patterns having respective alignment offsets in openings. During the ion implantation, the difference in incident angle of an ion beam between the positions on the wafer is compensated by the alignment offsets in the opening of the photoresist patterns.

Method of reducing offset for ion-implantation in semiconductor devices

In a wet processing apparatus, an electrolytic cell, a first storing cell for storing anode active water of the electrolytic cell, a first processing cell for processing a target with the anode active water of the first storing cell, a second storing cell for storing cathode active water of the electrolytic cell, and a second processing cell for processing a target with the cathode active water of the second storing cell are provided. Also, a first reactivating feedback path is provided between the first processing cell and an anode region of the electrolytic cell, and a second reactivating feedback path is provided between the second processing cell and a cathode region of the electrolytic cell.

Wet processing apparatus having individual reactivating feedback paths

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Tokyo, Japan

Makoto Iuchi