Fujitsu Corporation

Makoto Ikeshita

Hiromi Nanba

Masato Takeyabu

Tohru Mizutani

An evaluation circuitrepeats processing in which an output VD thereof is reset, there is obtained repeatedly given times a difference between sampled output voltages Vo of a replica circuitR when respective times tand thave elapsed after a voltage Vi is step-inputted to the replica circuitR, and the differences are successively summed. A comparator circuitcompares a difference cumulation voltage VD with a reference voltage VS. A bias adjustment circuitsteps up the bias currents of the replica circuitR and an adjusted circuitat every this given times if VD&#x3e;VS, and ceases the adjustment if VD&#x3c;VS.

Low power circuit with proper slew rate by automatic adjustment of bias current

An evaluation circuit repeats processing in which an output VD thereof is reset, there is obtained repeatedly given times a difference between sampled output voltages Vo of a replica circuit R when respective times t and t have elapsed after a voltage Vi is step-inputted to the replica circuit R, and the differences are successively summed. A comparator circuit compares a difference cumulation voltage VD with a reference voltage VS. A bias adjustment circuit steps up the bias currents of the replica circuit R and an adjusted circuit at every this given times if VD>VS, and ceases the adjustment if VD<VS.

Growing community of inventors

Sapporo, Japan

Makoto Ikeshita