Fujitsu Corporation

Nippon Telegraph and Telephone Public Corporation

Nec Corporation

Nippon Electric Co., Ltd.

Makoto Hiraoka

Kiichi Matsuda

Naoki Mukawa

Hideo Kuroda

Mitsuo Nishiwaki

Shuzo Tsugane

Toshio Ohshima

Shinobu Nomoto

Haruo Shimoyama

Toshio Hanabata

An inter-frame encoding/decoding equipment for television signals consists of inter-frame encoding equipment encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives an encoded signal sent from the inter-frame encoding device via a transmission line, which decodes by adding the output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic '1' in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit. The inter-frame decoding equipment is provided with a second operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic '1' in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit. The inter-frame decoding equipment is further provided with a comparator circuit which compares and checks the values operated by the first and the second operation circuits to detect a transmission error.

System for detecting a transmission error

Inter-frame encoding/decoding equipment for television signals includes inter-frame encoding equipment generating an encoded signal by encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives the encoded signal sent from the inter-frame encoding device via a transmission line. The decoding equipment decodes by adding its output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which calculates remainders obtained by dividing a predetermined value, into bit groups of the output or the input of the frame memory. The inter-frame decoding equipment is provided with a second operation circuit which calculates remainders obtained by dividing, the predetermined value, into the bit groups of the output or the input of its frame memory. The inter-frame decoding equipment is further provided with a comparator circuit which compares and checks the remainders calculated by the first and the second operation circuits to detect a transmission error.

The horizontal sync signal contained in the video signal from a video apparatus sometimes undergoes phase jump, resulting in failure of multiplexing of audio and video signals based on the horizontal sync signal. A sync signal switching circuit is adapted to produce a modified sync signal by switching the sync signal to a local sync signal upon occurrence of the phase jump, thereby assuring the multiplexing of audio and video signals.

Video/audio simultaneous transmission system

Growing community of inventors

Tokyo, Japan

Makoto Hiraoka