Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Makoto Hattori

Yasuyuki Doi

Shiro Dosho

Shiro Sakiyama

Yusuke Tokunaga

Toru Iwata

Takashi Hirata

Kurumi Nakayama

Hideki Ikeda

Hideki Yoshii

A delay element generates a delayed clock signal which transitions with a delay from a rising (or falling) of a reference clock signal by a delay amount determined based on an output of a loop filter. A signal generation circuit generates two signals which complementarily change according to rising and falling of the reference clock signal and a transition of the delayed clock signal. A charge pump circuit performs on the loop filter, according to these two signals, a push (or pull) operation during an interval extending from a rising (or falling) of the reference clock signal to the transition of the delayed clock signal and a pull (or push) operation during an interval extending from the transition of the delayed clock signal to a falling (or rising) of the reference clock signal.

Delay locked loop circuit

A converter of 6-bit input includes a reference voltage generating circuit generating 17 reference voltages, a first switch circuit having 19 switch pairs each including MOS transistors for selecting two adjacent reference voltages in accordance with the four most significant bits, a second switch circuit including a series circuit of MOS transistors for dividing the selected two reference voltages into four to obtain three intermediate voltages, and a third switch circuit for selectively outputting the lower of the selected two reference voltages or one of the three intermediate voltages. In a second mode in which a gray level having a smaller ON-resistance of a MOS transistor than that in the first mode is selected, the number of MOS transistors used in the first and second switch circuits for voltage division is increased.

Digital-to-analog converter

A time required for an output voltage of a source follower to rise from Low to a predetermined voltage depends on a bias voltage. Therefore, by setting a converged voltage of an output voltage to be high by increasing the bias voltage, the time required to rise up to the predetermined voltage can be reduced. Therefore, a first source follower which is biased so that the converged value of the output voltage becomes a predetermined Hi voltage when an input data signal goes from Low to Hi, and a second source follower which is biased so as to become the Hi voltage after a period of one clock when an input data signal goes from Low to Hi, are used. The two source followers are operated with appropriate timing.

Signal transmission circuit

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Kyoto, Japan

Makoto Hattori