Hitachi, Ltd.

Makiko Shinohara

Toyohisa Imada

Takashi Shimojo

Yoshihiro Harima

Hideaki Amano

Shuhei Matsumoto

Osamu Onodera

Isao Watanabe

Hironori Inoue

Hiroyuki Mitome

Kiichi Sato

Akiko Mori

When the number of logical CPUs increases as the number of LPARs increases, a physical CPU amount which a hypervisor uses will increase and thus the physical CPU resource cannot be effectively utilized. Grouping of LPARs and physical CPUs is performed and a logical CPU to which a physical CPU is allocated is selected from logical CPUs of an LPAR within a group.

Virtual computer and CPU allocation method

A user interface function for a virtual machine system based on a server or a PC is provided only by applying software without using SVP or the like. A control virtual machine is provided for controlling a virtual machine control screen which is displayed for defining virtual machines and instructing operations to the virtual machines. A virtual machine control program exclusively displays either a screen for each virtual machine or the virtual machine control screen in response to a screen switching instruction from an input device.

Virtual machine system and virtual machine control method

A virtual machine control method and a virtual machine system are disclosed. In the case where a guest program can be operated in a plurality of address translation modes and the same guest virtual address is translated into different host real addresses in each address translation mode, the illegal access to a host real address by illegal address translation by double registration in the same page table is avoided, and the address translation mechanism is efficiently operated. A plurality of host page tables are prepared in the main storage, and one of the host page tables is selected with the change in address translation mode of the guest program. The bottom address of the selected host page table is set in the host page table register thereby to switch the host page table.

Virtual machine control method and virtual machine system having host page table address register

Correction of a program which resides on a main storage and which is simultaneously callable by a plurality of command processors is performed by minimizing the stop time of a computer system without reloading a program. A particular command processor calls a correction execution program which corrects a program in accordance with a program correction command. The correction execution program reads program correction information, sets correction execution declaration information in all entries of other command processor in the correction execution declaration area of the main storage and after clearing all entries, the correction execution program corrects the program in accordance with the program correction information. The correction execution program sets correction completion reporting information in all entries for all of the other command processors in the correction completion reporting area of the main storage. The correction execution program waits for the correction completion reporting area to be cleared, at which time it sends the corrected program to the external storage. The program to be corrected calls a correction wait program, which recognizes the command processor which has called the correction wait program itself, checks an entry of the appropriate command processor in the correction execution declaration area. When the correction execution declaration information has been set, the correction wait program clears the correction execution declaration information, repeatedly checks the entry of the appropriate command processor in the correction completion reporting area, and when the correction completion reporting information has been set, clears same to thereby terminate the processing.

Program correcting method and system

Correction of a program which resides on a main storage and which is simultaneously callable by a plurality of command processors is performed by minimizing the stop time of a computer system without reloading a program. A particular command processor calls a correction execution program which corrects a program in accordance with a program correction command. The correction execution program reads program correction information, sets correction execution declaration information in all entries of other command processor in the correction execution declaration area of the main storage and after clearing all entries, the correction execution program corrects the program in accordance with the program correction information. The correction execution program sets correction completion reporting information in all entries for all of the other command processors in the correction completion reporting area of the main storage. The correction execution program waits for the correction completion reporting area to be cleared, at which time it sends the corrected program to the external storage. The program to be corrected calls a correction wait program, which recognizes the command processor which has called the correction wait program itself, checks an entry of the appropriate command processor in the correction execution declaration area.

A connection method of a plurality of input/output channels between a plurality of sub-channels of an information processing system having a virtual machine running on a physical machine under control of a hypervisor and a plurality of devices. The method includes issuing from the hypervisor a command for setting configuration information defining a plurality of configuration structures between the sub-channels set for the respective virtual machines and the devices in a storage device and acquiring configuration information containing the sub-channel corresponding to a designated device from the configuration information corresponding to one of the virtual machines based on the device designation contained in the input/output command from the one virtual machine. The virtual machines are enabled after the issuance of the set command and before the issuance of the input/output command. The corresponding configuration information is searched by using ID information of the virtual machine which issued the input/output command in order to execute the step so that one of a plurality of channel paths between a plurality of devices and the sub-channels is selected to execute the input/output designated by the input/output command.

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Hadano, Japan

Makiko Shinohara