Greenfield Networks, Inc.

Majid Torabi

Richard John Heaton

Harish Ramamurthy Devanagondi

Harish P Belur

Brian Arnold Petersen

Nicholas Bambos

A multi-slice network processor processes a packet in packet slices for transfer over a multi-port network interface such as a switch fabric. The network processor segments a packet into cells having a target size. A group of cells of a common packet form a packet slice which is independently processed by one of a number of parallel processing and storage slices. Load balancing may be used in the selection of processing slices. Furthermore, the network processor may load balance slices across the multi-port network interface to one or more destination slices of another network processor. The multi-slice processor uses post header storage delivery on ingress processing to the multi-port interface thereby reducing temporary storage requirements. The multi-slice network processor may also utilize sequence numbers associated with each packet to ensure that prior to transmission onto a destination network, the packet is in the correct order for a communication flow.

Multi-slice network processor

A parallel packet processing queueing architecture and method are described. A packet is divided up into cells. A first or start processor queue is selected for the first cell. The following cells of the packet are then placed in the queues in a predetermined order. An example of a predetermined order is placing the cells in consecutive processor queues modulo (the number of processor queues) after the start processor. Such a predetermined order is illustrated in the context of a per Cell Contiguous Queueing (CCQ) architecture. The architecture provides benefits of alleviating the pre-processing and post-processing buffering burdens and decreasing the amount of information required for reassembly of the packet.

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Los Altos Hills, CA, United States of America

Majid Torabi