Analog Devices International Unlimited Company

Analog Devices Global

Analog Devices Global Unlimited Company

Maitrey Kamble

Michael C W Coln

Michael C Coln

Sandeep Monangi

Arvind Madan

Debopam Banerjee

Vinayak Mukund Kulkarni

A data converter circuit comprises timing circuitry configured to time stages of a conversion performed by the data converter circuit; a level shifter circuit configured to receive a control signal associated with the conversion and provide a level shifted version of the control signal to one or more switch circuits of the data converter circuit; and a time delay circuit element including a replica circuit of the level shifter circuit that adds a circuit delay to a transition of the control signal at the timing circuitry.

Timing methods for SAR ADCs

An electronic circuit comprises a comparator circuit including an input circuit stage and an output circuit stage, and an input stage supply circuit coupled to a circuit supply rail and the input circuit stage. The input stage supply circuit includes a voltage generator circuit and a regulating circuit. The voltage generator circuit includes a replicate circuit of a portion of the input circuit stage to generate a voltage that is less than a voltage of the circuit supply rail and varies with the voltage of the circuit supply rail and device parameters of the replicate circuit. The regulating circuit generates a regulated input stage supply using the generated voltage.

Comparator preamplifier robust to variations in supply and common-mode

The present disclosure relates to a voltage reference circuit and a method of providing a voltage reference. The voltage reference circuit uses a switched capacitor arrangement to move charge between capacitors during different phases of operation of the circuit to which the voltage reference is being provided. The circuit being provided with a voltage reference may be an analog-to-digital converter (ADC). A reservoir capacitor is used to supply the reference voltage. During a phase in which no voltage reference is required, charge is shared between the capacitors of the switched capacitor arrangement, in order to boost the charge on the reservoir capacitor. After charge sharing, the reservoir capacitor is topped up with an output from a reference buffer. The reservoir capacitor may then be used again in the next conversion phase.

Voltage reference circuit and method of providing a voltage reference

To reduce the overall reference charge needed to perform operations, analog-to-digital converters can maintain reference voltage connections of the bit trial capacitors of the digital-to-analog converter (DAC) from the end of a current conversion to just prior to the beginning of the next acquisition phase. At the start of the next acquisition phase, the bottom plates of the bit trial capacitors of the DAC can be shorted to generate a common mode voltage. As the conversion phase begins, the bottom plates of the sampling capacitors are disconnected from the input voltage and the bottom plates of each bit trial capacitor are shorted to generate input common-mode voltage. As bit trials progress, the shorts between the bottom plates of the bit trial capacitors are removed and the bit trial results are applied to the bottom plates of the bit trial capacitors.

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Mumbai, India

Maitrey Kamble