Infineon Technologies Ag

Maik Stegememann

Uwe Rudolph

Lothar Brencher

The invention relates to a method for producing trenches for manufacturing storage capacitors in DRAM cell configurations. In the method, a two-stage hard mask having a first mask layer ( ) and an underlying second mask layer ( ) is used. A resist mask is applied to the mask layers ( ). The trenches are structured by etching processes, in which, in a first etching process, the first mask layer ( ) is etched selectively with respect to the resist mask, and in a second etching process, the second mask layer ( ) is etched selectively with respect to the first mask layer ( ).

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Dresden, Germany

Maik Stegememann