Netlogic Microsystems, Inc

Maheshwaran Srinivasan

Sandeep Khanna

Varadarajan Srinivasan

Mark Birman

Sachin Joshi

Chetan Deshpande

De Cai Li

Alexei Starovoitov

Venkat Rajendher Reddy Gaddam

Alexey Starovoytov

An integrated circuit device for delivering power to a load includes a controller circuit, a cascade circuit, and a power delivery circuit. The controller circuit generates a plurality of control signals. The cascade circuit receives the control signals from the controller circuit and sequentially outputs the control signals onto a cascade bus. The power delivery circuit receives the control signals from the controller circuit and delivers an amount of current to the load, in response to one of the control signals.

Multi-phase power system with redundancy

A search system for detecting whether one or more overlapping sequences of input characters match a regular expression including a prefix string preceding an intermediate expression having a quantified number m of characters belonging to a specified character class is disclosed. The search system includes a CAM array for storing the regular expression, a shift register for counting sequences of input characters that match the character class, and a control circuit that enables the shift register in response to a prefix match and increments the shift register in response to character class matches.

Content addressable memory having selectively interconnected shift register circuits

A method and apparatus are disclosed for determining the lengths of one or more substrings of an input string that matches a regular expression (regex) The input string is searched for the regex using an non-deterministic finite automaton (NFA), and upon detecting a match state a selected portion of the input string is marked as a match string. The NFA is inverted to create a reverse NFA that embodies the inverse of the regex. For some embodiments, the reverse NFA is created by inverting the NFA such that the match state of the NFA becomes the initial state of the reverse NFA, the initial state of the NFA becomes the match state of the reverse NFA, and the goto transitions of the NFA are inverted to form corresponding goto transitions in the reverse NFA. The match string is reversed and searched for the inverted regex using the reverse NFA, and a counter is incremented for each character processed during the reverse search operation. The current value of the counter each time the match state in the reverse NFA is reached indicates the character length of a corresponding substring that matches the regex.

Determining regular expression match lengths

Present embodiments allow a search engine to quickly save and restore state information to and from an external state memory when switching between multiple data flows by transferring the state information between the search engine and the external state memory in a parallel manner. More specifically, for CAM-based search engines configured according to present embodiments, the CAM array includes state information gating circuits that selectively allow state information stored in the CAM array's match latches to be transposed onto the array's bit lines and then read from the array using the array's sense amplifiers.

Content addressable memory device capable of parallel state information transfers

Content addressable memory device having state information processing circuitry

A content search system includes CAM device, a compiler, and an image loader. The CAM device, which includes a plurality of rows of CAM cells and a number of counter circuits selectively interconnected by a programmable interconnect structure (PRS), performs regular expression search operations. The compiler selectively converts the regular expression into a number of various bit groups, and the image loader loads corresponding bit groups into the CAM cells, into a number of memory elements that control configuration of the PRS, and into the counter circuits.

Compiling regular expressions for programmable content addressable memory devices

An apparatus and method of programming a search engine to implement regular expression search operations are disclosed that selectively transform a source regular expression into an equivalent reformulated regular expression in response to a determination of the architectural characteristics of the search engine. In this manner, the regular expression can be reformulated to optimize the configuration and available resources of the associated search engine.

Reformulating regular expressions into architecture-dependent bit groups

A content addressable memory (CAM) device includes a CAM array, a programmable interconnect structure, and a priority encoder. The CAM array includes a plurality of CAM rows, each row including a number of CAM cells for storing a data word and coupled to a match line that indicates a match result for the CAM row. The programmable interconnect structure is coupled to each CAM row and a plurality of CAM rows, each row including a number of CAM cells for storing a data word and coupled to a match line that indicates match results for the row. The programmable interconnect structure coupled to each CAM row, and is configured to logically connect any number N of selected CAM rows together to form a data word chain spanning N rows, regardless of whether the selected CAM rows are contiguous.

Power reduction in a content addressable memory having programmable interconnect structure

A content addressable memory (CAM) device includes a plurality of CAM rows, a number of sequencing logic circuits, and a programmable interconnect structure. Each CAM row includes a number of CAM cells to generate a match signal on a match line and includes an enable input. Each sequencing logic circuit includes an input and an output, and is configured to count sequences of match signals from the CAM rows. The programmable interconnect structure selectively connects the match line of any CAM row to the input of any sequencing logic circuit, and selectively connects the output of any sequencing logic circuit to the enable input of any CAM row.

Content addressable memory having selectively interconnected rows of counter circuits

Content addresable memory having selectively interconnected counter circuits

Content addresable memory having programmable interconnect structure

A system for searching an input string for a number of regular expressions includes a search block and a compiler. The search block includes a plurality of content addressable memory (CAM) devices, wherein each of the CAM devices is differently configured to implement search operations for regular expressions having a unique level of complexity. The compiler is configured to determine the complexity level of each of the regular expressions, and is configured to store each regular expression in a selected one of the CAM devices according to its complexity level.

Growing community of inventors

Santa Clara, CA, United States of America

Maheshwaran Srinivasan