Stmicroelectronics International N.v.

Stmicroelectronics S.a.

Stmicroelectronics Pvt. Ltd.

Nxp Usa, Inc.

Stmicroelectronics (grenoble 2) Sas

Mahesh Chandra

Brejesh Lall

Antoine Drouot

Ludovic Chotard

Michel Sanches

Vitor Schwambach

Amit Taneja

Antoine Gautier

A reciprocal approximation circuit has a first iteration circuit for generating an approximate reciprocal value of an operand. The operation of the first iteration circuit is controlled by two bits of the operand, which indicate a range in which the operand lies. The first iteration circuit uses hardware friendly initial values based on the two bits for generating the approximate reciprocal value. The reciprocal approximation circuit does not require any additional circuit for selecting an initial value for the first iteration circuit.

Reciprocal approximation circuit

Various embodiments provide an optimized image filter. The optimized image and video obtains an input image and selects a target pixel for modification. Difference values are then determined between the selected target pixel and each reference pixel of a search area. Subsequently, a weighting function is used to determine weight values for each of the reference pixels of the search area based on their respective difference value. The selected target pixel is then modified by the optimized image filter using the determined weight values. A new target pixel in an apply patch is then selected for modification. The new target pixel is modified using the previously determined weight values reassigned to a new set of reference pixels. The previously determined weight values are reassigned to the new set of reference pixels based on each of the new set of reference pixels' position relative to the new target pixel.

System and method for adaptive pixel filtering

An image sensor device may include an array of image sensing pixels with adjacent image sensing pixels being arranged in macropixel, and a processor coupled to the array of image sensing pixels. The processor may be configured to receive pixel signals from the array of image sensing pixels, and arrange the received pixel signals into macropixel signal sets for respective macropixels. The processor may be configured to perform, in parallel, an image enhancement operation on the received pixel signals for each macropixel signal set to generate enhanced macropixel signals, and transmit the enhanced macropixel signals.

Image sensor device with macropixel processing and related devices and methods

The invention concerns a method of performing, by an image processing device, object detection in an image comprising: performing one or more tests of a test sequence for detection of a first object on pixels values of a plurality of at least partially overlapping sub-regions () of a first search window (); generating a cumulative score based on results of said one or more tests on said plurality of sub-regions; comparing said cumulative score with a threshold value; and based on said comparison, selectively performing one or more of said tests of said test sequence on at least one further sub-region of said first search window, said at least one further sub-region at least partially overlapping each of said plurality of sub-regions.

Object detection in an image

A memory architecture for image processing comprising a memory array having multiple multi-byte memory data paths of equal multi-byte data width, and a multiplexing structure connected to the output of the multiple multi-byte data paths, capable of selectively providing a multi-byte data path of a desired width containing a desired permutation of bytes chosen from one or more of the multiple data paths.

Memory structure for optimized image processing

To provide a memory efficient method and system for statistical data accumulation and processing, data is divided into multiple data zones and divided into subgroups of memories. A separate memory bin is assigned for each of the subgroups, and this memory bin is shared between various two data zones in each subgroup for processing and accumulation. In this scheme, the histogram data in each location of the separate memory bin for the previously accumulated data zones is processed before updating the stored value for the data zone requiring data accumulation.

Memory reduction technique for statistics accumulation and processing

The conversion device includes an input for receiving data corresponding to an image to be displayed. The received data is in a JPEG decoder output data format A processor is included for reconstructing and writing the image to be displayed into the image memory, in a display module expected input data format. The bandwidth of the image memory is greater than one byte. The processor is fully hardwired and includes a first logic stage for writing the received data byte by byte into an intermediate memory at chosen addresses such that the written data form a sequence of data in the display module expected input data format, and a second logic stage for reading the written data in the intermediate memory, forming successive packets of read data having a size corresponding to the bandwidth, and successively writing the packets into the image memory at chosen addresses such that the written packets together form all the lines of the image.

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Ghaziabad, India

Mahesh Chandra