Maxim Integrated Products, Inc.

Maher Umari

Kaveh Razazian

Victor Loginov

Amir Hosein Kamalizad

Michael V Navid

Victor V Loginov

According to one embodiment of the invention, an integrated circuit comprises an encoding module, a modulation module and a spectral shaped module. The encoding module includes an interleaver that adapted to operate in a plurality of modes including a first mode and a second mode. The interleaver performs repetitive encoding when placed in the second mode. The modulation module is adapted to compensate for attenuations that are to be realized during propagation of a transmitted signal over the power line. The spectral shaped module is adapted to compensate for amplitude distortion and further compensates for attenuations that will be realized during propagation of the transmitted signal over the power line.

System and method for applying multi-tone OFDM based communications within a prescribed frequency range

An apparatus to process an input signal received via a power line in a power line communication system includes a jammer remover and a jammer detector. The jammer remover removes interference resulting from transmission of electricity and the input signal over the power line from the input signal. The jammer remover generates a jammer-canceled signal using an adaptive filtering procedure. The jammer detector is coupled to the jammer remover to detect the interference.

Jammer canceller for power-line communication

An embodiment is a method and apparatus to decode a signal using channel information. A channel state estimator generates a tone value representing channel information. A quantizer quantizes the tone value. A combiner combines de-interleaved symbols weighed by the quantized tone value. A comparator compares the combined de-interleaved symbols with a threshold to generate a decoding decision. Another embodiment is a method and apparatus to decode a signal using averaging. A channel estimator provides a channel estimate. A multiplier multiplies a quantized output of a demodulator with the channel estimate to produce N symbols of a signal corresponding to a carrier. A de-interleaver de-interleaves the N symbols. An averager averages the N de-interleaved symbols to generate a channel response at a carrier.

Soft repetition code combiner using channel state information

According to one embodiment of the invention, an integrated circuit comprises an encoding module, a modulation module and a spectral shaped module. The encoding module includes an interleaver that adapted to operate in a plurality of modes including a first mode, a second mod and a third mode. The interleaver performs repetitive encoding when placed in the second mode and even greater repetitive encoding when placed in the third mode.

Transmitter and method for applying multi-tone OFDM based communications within a lower frequency range

An embodiment is a method and apparatus to estimate channel quality. An absolute processor computes absolute real and imaginary values of real and imaginary parts, respectively, of output of a demodulator. A phase count unit generates first and second phase counts representing deviations from zero phase noise using the absolute real and imaginary values. An amplitude count unit generates first and second amplitude counts representing attenuation of a received signal using the absolute real and imaginary values. An integrator integrates the first and second phase counts and first and second amplitude counts into a signal quality indicator that represents a measure of quality of channel with respect to noise and fading.

Blind channel quality estimator

An embodiment is a method and apparatus to interleave data. A demultiplexer demultiplexes an input packet having N bits into L sub-packets on L branches. M flipping blocks flip M of the L sub-packets. M is smaller than L. L sub-interleavers interleave the (L-M) sub-packets and the M flipped sub-packets. A concatenator concatenates the interleaved sub-packets to form an output packet.

Block interleaving scheme with configurable size to achieve time and frequency diversity

An embodiment is a method and apparatus to perform symbol synchronization. A sign element obtains signs of samples in a sample vector. A correlation estimator computes a correlation of the sample vector. A synchronization detector detects symbol synchronization. Another embodiment is a method and apparatus to perform frame synchronization. A Fast Fourier Transform (FFT) processing unit computes a current FFT vector and an accumulated previous FFT vector. The current FFT vector and the accumulated previous FFT vector correspond to sample vectors associated with preamble symbols prior to symbol synchronization detection. A real and imaginary processing unit generates real and imaginary summations using the current FFT vector and the accumulated previous FFT vector. A mode processor generates mode flags representing operational modes using the real and imaginary summations.

Robust wideband symbol and frame synchronizer for power-line communication

An embodiment is a method and apparatus to process an input signal. An analog automatic gain control (AGC) processor controls an analog adjustable gain of the input signal using a feedback mechanism. The analog AGC processor generates a first signal. A processing circuit transforms the first signal into a second signal. A digital AGC processor controls a digital adjustable gain of the second signal using a feed-forward mechanism.

Combined dual feed-forward and feedback analog and digital automatic gain control for broadband communication

An embodiment is a method and apparatus to perform symbol synchronization. A correlation estimator computes a correlation of a sample vector representative of a narrowband signal. A synchronization detector detects symbol synchronization. Another embodiment is a method and apparatus to perform frame synchronization. A Fast Fourier Transform (FFT) processing unit computes a current FFT vector and an accumulated previous FFT vector. The current FFT vector and the accumulated previous FFT vector correspond to sample vectors associated with preamble symbols. A real and imaginary processing unit generates real and imaginary summations using the current FFT vector and the accumulated previous FFT vector. A mode processor generates mode flags representing operational modes using the real and imaginary summations.

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Irvine, CA, United States of America

Maher Umari