Navitas Semiconductor Limited

Maher J Hamdan

Daniel Marvin Kinzer

Santosh Sharma

Pil Sung Park

A gallium nitride transistor includes a substrate on which a source region, a drain region, a drift region and a gate region are defined. The drift region extends between the source region and the drain region. The gate region includes a combination of enhancement-mode and depletion-mode devices that are positioned across the drift region and are used together to control charge density and mobility of electrons in the drift region with a relatively low threshold voltage (V). Enhancement-mode devices are formed using a P-type layer disposed on the substrate and coupled to a gate electrode.

Transistor structure with depletion-mode and enhancement mode-devices

A gallium nitride transistor includes one or more P-type hole injection structures that are positioned between the gate and the drain. The P-type hole injection structures are configured to inject holes in the transistor channel to combine with trapped carriers (e.g., electrons) so the electrical conductivity of the channel is less susceptible to previous voltage potentials applied to the transistor.

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Lake Forest, CA, United States of America

Maher J Hamdan