Hitachi, Ltd.

Renesas Technology Corp.

Madoka Minagawa

Naoya Kanda

Shigeharu Tsunoda

Kosuke Inoue

Hiroshi Hozoji

Asao Nishimura

Ichiro Anjo

Yoshihide Yamaguchi

Hiroyuki Tenmei

Noriyuki Oroku

Kenji Ujiie

Akira Yajima

Toshiki Sugawara

Norio Chujo

Naoki Matsushima

Yasunobu Matsuoka

Saori Hamamura

Satoshi Kaneko

Tsutomu Kono

Koichiro Adachi

Hiroshi Homma

In fabricating an optical I/O array module, an optical waveguide provided with mirror parts, each having a tapered face, is formed on a substrate, a convex shaped member or a concave shaped member is placed at spots above the respective mirror parts of the optical waveguide, and laser diode arrays and photo diode arrays, provided with either a concave shape, or a convex shape, are mated with, or into the convex shaped member or the concave shaped member before being mounted. Further, there are formed multiple filmy layers, on which an LSI where a driver IC LSI of optical elements, and an amplifier LSI of the optical elements are integrated.

Optical I/O array module and its fabrication method

A photoelectric composite wiring module, being superior in performances and mass-productivity thereof, and a transmission apparatus of applying that therein are provided. Optical devicesandare disposed on a circuit board, so that they are optically coupled with optical guidesformed on the circuit board, wherein a filet-like resin is formed on a side surface of a bump, which is formed on side surfaces or/and upper portions of the optical devices, on an upper layer thereof being compressed a resin film to be adhered thereon, thereby forming an insulation film, and an electric wiring layeris laminated, so that the electrodes of the optical devicesand wirings of the electric wiring layer are electrically connected with, and further thereon is mounted a semiconductor element; thereby obtaining the structure for brining the transmission speed to be high per channel, and for preventing the power consumption from increasing. Also, it has the structure of not causing deterioration of the optical devices due to ill influences of moisture, thereby achieving high reliability. Further, it also produces an easy connecting method with a transmission apparatus, and high productivity thereof.

Photoelectric composite wiring module and method for manufacturing same

A photoelectric composite wiring module includes a circuit substrate, an optical device, an LSI (device) having a driver and an amplifier for the optical device, and a thin film wiring layer having an electrical wiring. The optical device is connected with the LSI by means of the electrical wiring. The optical device is formed on the circuit substrate and optically coupled to an optical waveguide formed in the circuit substrate. The thin film wiring layer is formed on the optical device to ensure that the optical device is electrically connected with the electrical wiring of the thin film wiring layer. The LSI is mounted on and electrically connected with the thin film wiring layer.

Photoelectric composite wiring module and method for manufacturing the same

When an RFID-tag is formed by joining a semiconductor chip (RFID chip) to an antenna consisting of a rolled metal foil or the like using ultrasonic waves, the pressure impressed to the semiconductor chip is suppressed to avoid the damage of the semiconductor chip. For this purpose, the present invention provides an RFID-tagwherein gold bumps are joined to the metal foil by pressing the gold bumps formed on the semiconductor chip against an antenna member, and impressing ultrasonic waves; and the RFID-tag wherein a matte surface having a low glossiness is formed on the metal foil, or a surface having shallow rolling streaks is formed on the metal foil, and gold bumps are joined to the surface.

RFID-chip having RFID-tag or magnifying electrode

The present invention aims to improve the durability of an RFID chip inlet. A module including an RFID chip amounted to an antenna is covered with polyimide film with an adhesive layer to make up an RFID inlet. The outer surface of the RFID inlet is then covered with the surface processed to increase surface lubricity of a base part. When the RFID inlet is for use in a rubber product, it is mounted to a rubber base of the rubber product, the exposed surface of the RFID inlet is covered with an unvulcanized rubber, and the unvulcanized rubber is then pressed and heated causing the RFID inlet to be embedded in the rubber base.

Electronic device, rubber product, and methods for manufacturing the same

There is a method of manufacturing an RFID, in which a semiconductor chip with a memory is bonded to an antenna, so that the information recorded in the memory can be transmitted through the antenna. In the RFID, a PET film, a PEN film, or a sheet of paper is used as the base material of the antenna. The method includes: aligning the semiconductor chip with gold bumps relative to the antenna, in which a metal foil formed of an aluminum or an aluminum alloy is adhered to the base material, including a polyethylene terephthalate or a polyethylene naphthalate; pressing the semiconductor chip to the antenna; and applying ultrasonic waves under an ambient temperature lower than the glass transition temperature of the polyethylene terephthalate or the polyethylene naphthalate, to thereby bond the gold bumps and the metal foil. Thus, the method suppresses the deformation of the antenna.

Method of manufacturing RFID

A semiconductor apparatus in which flip chip bonding is enabled without any underfill, and which comprises a semiconductor device, an electrically insulating layer formed on the semiconductor device by mask-printing an electrically insulating material containing particles, and an external connection terminal formed on the electrically insulating layer and electrically connected with an electrode of the semiconductor device. The electrically insulating layer is formed with a thickness so as to provide &#x3b1;-ray shielding of the semiconductor device.

Semiconductor device and method for producing the same

A semiconductor device is provided which enables a flip chip connection without use of underfill. The semiconductor device includes a semiconductor element having circuit electrodes and a circuit surface coated with a protecting film. A stress relaxation layer is provided by coating a cured thermoplastic resin onto the protecting film of the circuit surface in a manner which leaves the circuit electrodes exposed and curing it and having an inclination in the edge portion thereof. A wiring layer with wirings is connected to each of the circuit electrodes and disposed so as to make an electrical connection from the circuit electrodes, via the edge portion of the stress relaxation layer, and to a desired portion on the surface of the stress relaxation layer. A protecting film is provided thereon, and an external connection terminal is also provided.

Semiconductor device and method for manufacturing the same and semiconductor device-mounted structure

A semiconductor apparatus comprising a semiconductor device, an electrically insulating layer formed on the semiconductor device, and an external connection terminal formed on the electrically insulating layer and electrically connected to an electrode of the semiconductor device, wherein a power/ground line and a signal line in a region of from an edge of the electrically insulating layer to a uniform-thickness flat portion of the electrically insulating layer are different in kind of wiring pattern from each other.

Semiconductor apparatus including insulating layer having a protrusive portion

A semiconductor apparatus in which flip chip bonding is enabled without any underfill, and which comprises a semiconductor device, an electrically insulating layer formed on the semiconductor device by mask-printing an electrically insulating material containing particles, and an external connection terminal formed on the electrically insulating layer and electrically connected with an electrode of the semiconductor device.

Method for producing a semiconductor device

A semiconductor apparatus includes a semiconductor device having circuit electrodes aligned centrally of the semiconductor apparatus. A first electrically insulating layer is formed on said semiconductor device with said circuit electrodes being exposed from said first insulating layer. A second electrically insulating layer is formed on said first insulating layer, and external connection terminals are formed on said second insulating layer. A wiring is formed on said second insulating layer to electrically connect said external connect terminals to said circuit electrodes of said semiconductor device, and a third electrically insulating layer is formed on said second insulating layer and on said wiring. Particles are provided in the second insulating layer to control a shape of said second insulating layer.

Growing community of inventors

Yokohama, Japan

Madoka Minagawa