Texas Instruments Corporation

Madhulatha Bonu

Subhashish Mukherjee

Kumar Anurag Shrivastava

Abhijit Anant Patki

Venugopal Gopinathan

Udayan Dasgupta

Ganesan Thiagarajan

Janakiraman S

Lokesh Kumar Gupta

Deep Banerjee

Vikas Kumar Thawani

A controller area network including one or more first network nodes biased from a first power supply voltage, and a second network node biased from a second, lower, power supply voltage. The second network node includes a transmitter driving a differential voltage onto bus lines to communicate a dominant bus state at a second dominant state common mode voltage, a receiver coupled to the bus lines, sense circuitry to sense a common mode voltage at the bus lines, and control circuitry to control a recessive state common mode voltage in response to the sensed dominant state common mode voltage.

Control of conducted emissions among heterogenous transceivers in controller area networks

Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.

Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop

Methods and apparatus generate an oscillating output signal having a voltage swing greater than a voltage swing across nodes of active devices. An example oscillator includes a tank to generate an oscillating output signal in response receiving an edge of an enable signal; a feedback generator including a first gain stage forming a first feedback loop with the tank, the first feedback loop providing a first charge to maintain the oscillating output signal and a second gain stage forming a second feedback loop with the tank, the second feedback loop providing a second charge to maintain the oscillating output signal, the first and second charges combining with the oscillating output signal to generate a high voltage swing; and an attenuator connected between the tank and the feedback generator to isolate the tank from active components of the feedback generator.

Oscillator apparatus

Methods and apparatus are disclosed to generate an oscillating output signal having a voltage swing greater than a voltage swing across nodes of active devices. An example oscillator includes a tank to generate an oscillating output signal in response receiving an edge of an enable signal; a feedback generator including a first gain stage forming a first feedback loop with the tank, the first feedback loop providing a first charge to maintain the oscillating output signal and a second gain stage forming a second feedback loop with the tank, the second feedback loop providing a second charge to maintain the oscillating output signal, the first and second charges combining with the oscillating output signal to generate a high voltage swing; and an attenuator connected between the tank and the feedback generator to isolate the tank from active components of the feedback generator.

Methods and apparatus for generating a high swing in an oscillator

A circuit includes an amplifier having an input that receives an alternating current (AC) waveform and an output that is coupled to a power source via a bias resistor. A bulk acoustic wave (BAW) resonator is coupled in parallel to the bias resistor via the power source and the amplifier output. The BAW resonator and the amplifier output forms a band pass filter to filter the AC waveform received at the amplifier input and to provide a filtered AC waveform at the amplifier output.

Band pass filter utilizing parallel resonance of BAW resonator

Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase; when the data signal is oscillating at the first phase, output a first logic value; and when the data signal is oscillating at the second phase, output a second logic value, the output of the fast phase change detection circuit being used to determine whether the first output signal or the second output signal will be utilized in the feedback loop of the low bandwidth phase lock loop.

A snapout calculator, and wherein the snapout calculator determines where the reference levels for the various comparators shall be placed after each asynchronous sample is generated.

Asynchronous sampling using a dynamically adustable snapback range

A method, comprising: receiving an analog input; determining an upper outer rail and a lower outer rail as polling values to be used by voltage comparators; blanking at least three comparators; determining which two of the at least three comparators are closest to the input analog voltage levels; defining the two comparators which are closest to the analog input signal to be the next comparators of the next sampling process; assigning a remaining comparator at a voltage level in between the new top and bottom voltage levels; enabling the outer rails, but blanking the inner rail; progressively narrowing down the voltage range spanned by the two outer comparators; and generating a 2-tuple value of an asynchronous voltage comparator crossing.

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Bengaluru, India

Madhulatha Bonu