Nxp B.v.

Madan Vemula

James Raymond Spehar

Gerrit Willem Den Besten

Jingsong Zhou

Siamak Delshadpour

Chiahung Su

James Caravella

A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths.

Signal path isolation for conductive circuit paths and multipurpose interfaces

Aspects of the present disclosure are directed to providing power from two or more power sources. As may be implemented in accordance with one or more embodiments, a switching circuit includes a switching transistor connected between a backup power supply and both a primary power supply and an internal power rail. When power is provided via the primary power supply, the switching circuit operates in a blocking state in which back current is prevented from flowing to the backup power supply while the primary power supply couples power to the internal power rail. When the primary power supply is disconnected or interrupted, a voltage coupled to a gate/control terminal of the switching circuit drops and the switching circuit automatically switches to another state in which the internal power rail is powered by the backup power supply.

Autonomous power supply

Aspects of the present disclosure are directed to circuits, apparatuses, and methods for power management. According to an example embodiment, an apparatus includes a low drop-out (LDO) voltage-regulation circuit configured to generate a regulated voltage from a voltage provided to a supply terminal of the LDO voltage-regulation circuit. The apparatus also includes switching circuitry coupled to the LDO voltage-regulation circuit and to a plurality of voltage sources. The voltage sources include at least power line carried along with a data bus and another voltage source. Each of the plurality of voltage sources provides a respectively different voltage range. The switching circuitry is configured, in response to a power-related condition of the plurality of voltage sources and while maintaining power to the LDO voltage-regulation circuit, to select and couple one of the voltage sources to the supply terminal and uncouple other ones of voltage sources from the supply terminal.

Power supply interface having multiple voltage sources

Aspects of the present disclosure are directed to addressing impedance-matching issues. As may be implemented in connection with one or more embodiments, an apparatus includes an integrated circuit (IC) chip having a signal-connection terminal and processing circuitry that passes signals along a communication path that is within the IC chip and connected to the signal-connection terminal. Impedance-matching circuitry operates to provide impedance-matching for the communication path, therein mitigating signal loss due to impedance-mismatching. A chip-mounting structure secures the IC chip and electrically connects thereto at the signal-connection terminal.

Communication circuit with impedance matching

Cross-talk is mitigated in a switching circuit. In accordance with one or more embodiments, an apparatus includes a multi-pin connector having signal-carrying electrodes that communicate with a device external to the apparatus, and respective field-effect switches that couple the signal-carrying electrodes to respective communication channels in the apparatus. The switches include a first field-effect semiconductor switch having a gate electrode adjacent a channel region that connects electrodes (e.g., source and drain regions) when a threshold switching voltage is applied to the gate, in which the electrodes are connected between one of the signal-carrying electrodes and a first channel coupled to an electrostatic discharge (ESD) circuit. A bias circuit mitigates cross-talk between the communication channels by biasing the channel region of the first field-effect semiconductor switch (in an off state) to boost the threshold switching voltage over a threshold discharge voltage of the ESD circuit.

Cross talk mitigation

A data link circuit switches high-speed signals through FET-based circuitry between channels. A FET responds to control signals at the gate terminal to operate in either a signal-passing mode or another (blocking) mode. In the passing mode, an AC (high-speed) signal is passed between the S-D terminals by coupling a first signal portion (of the AC signal) and with another signal portion diverted by the inherent capacitances associated with the FET. For offsetting the loading caused by the inherent capacitances associated with the FET-based switch, a biasing circuit is configured and arranged to bias the back-gate terminal of the FET transistor with a follower signal.

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Tempe, AZ, United States of America

Madan Vemula