Nxp B.v.

Nxp Usa, Inc.

Nexperia B.v.

Madan Mohan Reddy Vemula

Xiaoqun Liu

Chiahung Su

Siamak Delshadpour

Kenneth Jaramillo

Mohammad Nizam Kabir

Gijs Jan De Raad

Xueyang Geng

Abhijeet Chandrakant Kulkarni

Xu Jason Ma

Steven Daniel

Harold Garth Hanson

Sharad Murari

Krishnan Tiruchi Natarajan

Abjijeet Chandrakant Kulkarni

Aspects of the subject disclosure may include, for example, obtaining, by a first circuit of a charge pump circuit, charge sourced from a power supply operative at a first voltage level, wherein the first circuit comprises a first plurality of transistors, and wherein each of the first plurality of transistors is rated for operation at an applied voltage that is less than the first voltage level, storing the charge in a first capacitor of the first circuit at a first point in time, and transferring the charge stored in the first capacitor to a second capacitor of a second circuit of the charge pump circuit at a second point in time such that the second capacitor stores the charge, wherein the second point in time is subsequent to the first point in time. Other embodiments are disclosed.

High-voltage charge pump using low-voltage technology

A low dropout regulator includes a first stage that generate a first output voltage and a second stage that generates a second output voltage different from the first output voltage. The first stage and the second stage are coupled in parallel to a node, the stages are selectively controlled respective first and second output signals based on different conditions. One condition may be operation of a load in one or more predetermined modes. Another condition may be transition between modes. Selective control of the first stage during a mode transition may reduce voltage undershoot or voltage overshoot in the load.

Parallel low dropout regulator

A power source switching circuit is disclosed. The power source switching circuit includes a voltage regulator, a first transistor and a second transistor. The first transistor is coupled with a first voltage source and the second transistor is coupled with a second voltage source. The voltage regulator includes a resistor, one or more diodes coupled together in series and a capacitor. Terminals of the capacitor are coupled between a gate and a source of the first transistor through a first switch and a second switch respectively. The capacitor is configured to hold charge to switch the first transistor on. A value of the capacitor is smaller than a gate to source capacitance of the first transistor.

Power source switching

A power switch over current protection system including a power switch transistor configured to deliver a power current from a power source to power load, a power switch driver configured to control and on/off state of the power switch, an over current protection (OCP) circuit to detect a threshold value of the power current, a discharge transistor configured to discharge a parasitic capacitance of the power switch transistor, and a system state machine to receive a signal from the OCP circuit configured to control an action of the power switch driver and discharge transistor depending on the level of the power current.

Power switch over current protection system

Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, the ESD protection circuit is connected between a Vrail and a Vrail and includes an internal floating ESD rail located between the Vrail and the Vrail, I/O pins connected between the internal floating ESD rail and the Vrail, ESD diodes corresponding to at least one I/O pin, an internal bias cell corresponding to an I/O pin and configured to short the corresponding I/O pin to the internal floating ESD rail when the I/O pin is pulled high, and an internal bias cell corresponding to a Vpin of the Vrail and configured to short the Vrail to the internal floating ESD rail when the Vpin is pulled high.

Electrostatic discharge (ESD) protection for use with an internal floating ESD rail

A multi-stage charge pump including a first stage configured to generate a first output voltage, a last stage configured to receive the first output voltage from the first stage and output a second output voltage, a switch configured to receive the second output voltage from the last stage, and a voltage regulator circuit configured to control the second output voltage of the last stage to maintain a substantially constant on-resistance of the switch.

Multi-stage charge pump regulation architecture

A multi-stage charge pump circuit including a first stage of the multi-stage charge pump having a first voltage output, a last stage of the multi-stage charge pump having a first voltage input, and an inter-stage limitation circuit configured to protect a voltage drop of the first voltage output of the first stage of the multi-stage charge pump when there is a voltage drop on the first voltage input of the last stage of the multi-stage charge pump.

Multi-stage charge pump with inter-stage limitation circuit

Low power solutions can be provided in a serial bus system with a logic controller circuit. The logic controller circuit can include analog circuitry that includes a plurality of analog components and trimming circuitry for configuring the analog components. Digital circuitry can be configured to switch between an active mode and a hibernation mode, wherein the hibernation mode consumes less current than the active mode. A voltage regulator circuit can be configured to generate a regulated voltage from a supply voltage. A reset generation circuit can be configured to determine that the supply voltage has reached a first threshold voltage level and enable the voltage regulator circuit. When the regulated voltage has reached a second threshold voltage level and the supply voltage has reached a third threshold voltage level, the digital circuitry can be switched to the active mode.

Serial bus apparatus with controller circuit and related uses

Embodiments of a resistor module of a USB interface device and a method for operating a resistor module of a USB interface device are described. In an embodiment, a resistor module of a USB interface device includes a pull-down resistor connectable to a USB power-sourcing device, a switch connected between the pull-down resistor and a fixed reference voltage, an energy storage unit connectable to the USB power-sourcing device and configured to store electrical energy in response to a current from the USB power-sourcing device, a switch control unit connected to the energy storage unit and configured to control the switch with a control signal in response to a voltage of the energy storage unit, and a glitch filter connected to the switch and to the switch control unit and configured to remove a glitch in the control signal. Other embodiments are also described.

Resistor module of a USB interface device and a method of operating a resistor module of a USB interface device

A protocol can specifie a power-sourcing voltage range that indicates power sourcing capabilities. Additional power sourcing capabilities can be communicated using voltage variations within the power-sourcing voltage range. A power-sourcing device can provide power to an external power-sinking device over a wired connection containing a plurality of wires. A voltage control circuit can be configured to drive a voltage over a wire of the plurality of wires. Processing circuitry can communicate, using the voltage control circuit, first power-sourcing capabilities to the external power-sinking device by setting the voltage over the wire to a value within the power-sourcing voltage range. The processing circuitry can also communicate, using the voltage control circuit, the additional power sourcing capabilities of the power-sourcing device using voltage variations on the wire, the voltage variations maintaining voltage on the wire within the power-sourcing voltage range.

Communications for power delivery solutions

One or more characteristics of devices are ascertained in accordance with one or more aspects of the disclosure. As may be consistent with one or more embodiments, the attachment of an external circuit to an input port is detected based on a resistance value presented by the external circuit. A resistance range that includes the resistance value presented at the input port is determined, in response to detecting the attachment, by dynamically coupling one or more of a plurality of resistor-based circuits relative to the input port. A signal presented by the external circuit on the input port is coded based on the determined resistance range, using one or more of the resistor-based circuits, and the code is used to identify a type of the external circuit. These aspects can provide for the communication of power and data with a variety of different types of external circuits.

Interface detection circuit

Aspects of the present disclosure are directed to detecting and powering external circuits via a common port. As may be implemented in accordance with one or more embodiments, an accessory detection circuit detects a type of an external circuit based upon a pull-down resistance at an interface port (e.g., where each accessory type provides a discernable pull-down resistance). Power switching circuitry couples power between the interface port and an internal power-based circuit, and operates in an open condition when the accessory detection circuit is active. An adaptive biasing circuit sets a voltage across the power switching circuitry to about zero, based on a voltage level provided on the interface port, thereby mitigating changes in the pull-down resistance due to current leakage. Once the type of external circuit is identified, the power switching circuitry couples power between the external circuit and the internal circuit.

Interface apparatus with leakage mitigation

Various aspects of the disclosure are directed to methods and apparatuses involving providing a clock signal. As consistent with one or more embodiments herein, a sawtooth waveform signal is generated in a manner that facilitates low power operation. In some implementations, the sawtooth waveform signal is generated using an oscillator that operates without necessarily employing R-C circuits and/or without rail-to-rail voltage supply, such as via a nonlinear oscillator. The sawtooth waveform signal is used to generate a trapezoidal waveform signal, and a clock signal is generated using the trapeziodal waveform signal.

Sawtooth oscillator and apparatuses

A voltage regulator circuit and a method for operating the voltage regulator circuit are described. In one embodiment, a voltage regulator circuit includes an input terminal to receive an input signal from a power interface, an output terminal to output an output signal using the input signal, an output voltage monitor circuit configured to compare the voltage of the output signal with a predetermined voltage threshold, and a current limit circuit configured to limit current flowing on a path from the input terminal to the output terminal to a transient current limit level. The transient current limit level is lower than a predefined current limit threshold of the power interface. Other embodiments are also described.

Voltage regulator circuit with adaptive current limit and method for operating the voltage regulator circuit

Aspects are directed to low dropout regulation. In accordance with one or more embodiments, an apparatus includes a charge pump that generates an output using a reference voltage, a low dropout (LDO) regulator circuit, current-limit and a voltage-limit circuit. The LDO circuit includes an amplifier powered by the charge pump and that provides an LDO voltage output. The voltage-limit circuit includes a transistor coupled between a voltage supply line and the LDO regulator circuit and a gate driven by the charge pump. The voltage-limit circuit limits voltage coupled between the voltage supply line and the LDO regulator circuit based upon the output of the charge pump, such as by coupling the voltage at the voltage supply line via source/drain connection of the transistor under low-voltage conditions, and providing a limited voltage to the LDO regulator circuit under high voltage conditions on the voltage supply line.

Growing community of inventors

Tempe, AZ, United States of America

Madan Mohan Reddy Vemula