Alliedsignal Inc.

Quantum Semiconductor LLC

Lynn Forester

Carlos J R P Augusto

Neil H Hendricks

Jingjun Yang

James S Drage

Shi-Qing Wang

Dong Kyu Choi

Dong K Choi

Reza Hosseini

Carlos Jrp Augusto

Dong-Kyu Choi

Carlos JRP Augusto

An epitaxial device module monolithically integrated with a CMOS structure in a bulk or thick-film SOI substrate, comprising an active area on which epitaxial layers are formed by selective or non-selective epitaxial growth and a separate active area in which the CMOS structure is formed. A hard mask for epitaxy having an opening therein provides self-alignment for optional ion implants into the substrate. The ion-implanted region overlaps the active region underneath the epitaxial layer, a portion of the source/drain region of the CMOS structure and the isolation region separating the two active areas, thereby establishing a conductive path underneath the isolation region between the two active areas.

Method of fabricating heterojunction photodiodes with CMOS

A method of fabricating heterojunction devices, in which heterojunction devices are epitaxially formed on active area regions surrounded by field oxide regions and containing embedded semiconductor wells. The epitaxial growth of the heterojunction device layers may be selective or not and the epitaxial layer may be formed so as to contact individually each one of a plurality of heterojunction devices or contact a plurality of heterojunction devices in parallel. This method can be used to fabricate three-terminal devices and vertically stacked devices.

Method of fabricating heterojunction devices integrated with CMOS

A method in which thin-film p-i-n heterojunction photodiodes are formed by selective epitaxial growth/deposition on pre-designated active-area regions of standard CMOS devices. The thin-film p-i-n photodiodes are formed on active areas (for example n-doped), and these are contacted at the bottom (substrate) side by the 'well contact' corresponding to that particular active area. There is no actual potential well since that particular active area has only one type of doping. The top of each photodiode has a separate contact formed thereon. The selective epitaxial growth of the p-i-n photodiodes is modular, in the sense that there is no need to change any of the steps developed for the 'pure' CMOS process flow. Since the active region is epitaxially deposited, there is the possibility of forming sharp doping profiles and band-gap engineering during the epitaxial process, thereby optimizing several device parameters for higher performance. This new type of light sensor architecture, monolithically integrated with CMOS, decouples the photo-absorption active region from the MOSFETs, hence the bias applied to the photodiode can be independent from the bias between the source, drain, gate and substrate (well) of the MOSFETs.

Method of fabricating heterojunction photodiodes integrated with CMOS

An improved method for producing substrates coated with dielectric films for use in microelectronic applications wherein the films are processed by exposing the coated substrate surfaces to a flux of electron beam. Substrates cured via electron beam exposure possess superior dielectric properties, density, uniformity, thermal stability, and oxygen stability.

Electron-beam processed films for microelectronics structures

A process for the preparation of substrates used in the manufacture of integrated circuits wherein spin-on low dielectric constant (low-k) polymer films are applied on semiconductor substrates. A non-etchback processing of spin-on low-k polymer films, without losing the low dielectric constant feature of the film, especially in between metal lines, is achieved utilizing electron beam radiation. A polymeric dielectric film is applied and dried onto a substrate and exposed to electron beam radiation under conditions sufficient to partially cure the dielectric layer. The exposing forms a relatively more hardened topmost portion of the dielectric layer and a relatively less hardened underlying portion of the dielectric layer.

Integration of low-k polymers into interlevel dielectrics using

Nanoporous silica dielectric films are modified by electron beam exposure after an optional hydrophobic treatment by an organic reactant. After formation of the film onto a substrate, the substrate is placed inside a large area electron beam exposure system. The resulting films are characterized by having a low dielectric constant and low water or silanol content compared to thermally cured films. Also, e-beam cured films have higher mechanical strength and better resistance to chemical solvents and oxygen plasmas compared to thermally cured films.

Nanoporous silica dielectric films modified by electron beam exposure

A method for forming a gap-filled, planarization structure of dielectric materials on a substrate topography useful for forming microelectronic devices. A dielectric material is first deposited as continuous, dry dielectric layer, preferably a SOG layer. Then the dielectric layer is partially removed by chemical-mechanical polishing (CMP). The chemical and mechanical properties of the structure can be chosen by varying the composition of the SOG layer and the subsequent CMP conditions.

Growing community of inventors

San Jose, CA, United States of America

Lynn Forester