L-3 Communications Corporation

Phonex Broadband Corporation

Lyman D Horne

DeLon K Jones

Samuel Charles Kingston

Douglas M Grover

Michael J Miller

W Paul Willes

Dan M Griffin

Steven T Barham

Randal R Sylvester

Zachary C Bagley

Ronald S Leahy

David S Nelson

Brad Terry Hansen

Steven B Perkins

Leroy Andrew Gibson, Jr

A data networking system designed to provide efficient, yet reliable, transportation of data across a time division multiplexed network. This invention allows for redundantly sending data segments wherein if bad data segments are received, they can be resent in a dynamic manner depending on the network condition and segments can be fragmented, resized and sent with low overhead due to dynamic header sizes, segment sizes, forward error correction, and cyclic redundancy checks. The result is a very adaptive network that meets the demanding requirements of networks such as power line and wireless while still being able to transport data for voice, audio, video, computer, control, and the like.

Reliable method and system for efficiently transporting dynamic data across a network

A network synchronization method designed to provide synchronization of multiple networks and devices. This invention provides a specific method for determining which nodes are responsible for network synchronization as nodes fail or cannot see each other due to conditions on the network. This allows for fault tolerance in a network in which conditions change dynamically. In addition, this invention uses synchronization codes and network numbers to isolate separate networks using the same physical medium, thus allowing sharing of network resources.

Method and system for network synchronization and isolation

A method and system for using power and timing estimates to acquire frame acquisition of a reverse CDMA carrier signal. The method includes providing at least one remote transceiver device acquiring a forward CDMA carrier signal, and the one remote transceiver device transmitting a reverse CDMA carrier signal modified to include a frequency associated with the forward CDMA carrier signal. A transceiver base station, in response to determining if the reverse CDMA carrier signal exceeds a reverse CDMA carrier signal threshold (RCCST), uses the frequency embedded in the modified reverse CDMA carrier signal to acquire phase of the reverse CDMA carrier signal. Achieving acquisition the transceiver base station signals a mode change to the remote transceiver. Otherwise, the transceiver base station signals the remote transceiver device to slip the reverse CDMA carrier signal a predetermined number of chips; and/or transmit the reverse CDMA carrier signal at a second power level.

Acquisition of a synchronous CDMA TDD QPSK waveform using power and timing estimates

A method and system for open-loop acquisition of a pseudo-noise (PN) encoded QPSK burst signal is provided. The method includes the steps of determining a PN correlation accumulation (PNCA) threshold and a sync threshold. Searching for a burst signal synchronization by searching a burst preamble for a sync word exceeding the sync threshold. In response to detecting the sync word, performing a PNCA of at least 256 bits following the detected sync word and comparing the PNCA of the at least 256 bits with the PNCA threshold. The comparison further includes the step of verifying that the PNCA of the 256 bits following the detected sync word exceeds the PNCA threshold and then verifying sync word detection. Next, using the burst preamble an estimate of carrier signal frequency is determined; and using a subsequent burst preamble carrier signal frequency and carrier signal phase is determined.

Acquisition of a synchronous CDMA TDD QPSK waveform using variable thresholds for PN and burst synchronization

A method and device for frame sync detection using signal combining and correlation. The method comprises the steps of despreading PN coded signals to provide in-phase I&#x2013;I, and quadrature phase Q&#x2013;Qsignals, wherein each I&#x2013;Iand each Q&#x2013;Qsignal contains at least one sync bit and n&#x2267;2. The at least one sync bit from each I&#x2013;I, and quadrature phase Q&#x2013;Qsignals are summed to form sums Iand Q, respectively. The next step provides a reference sync having at least one bit and compares each sum Iand Qwith the at least one reference bit. The results of each Iand Qcomparison are accumulated so as to form two accumulates, Iand Q, respectively. Each accumulate Iand Q, is squared to form Iand Qfrom which the sum Iand Qis formed. The sum I+Qis compared with a predetermined threshold and as a result of the comparison a determination of whether frame sync has been achieved is made.

Method and device for frame sync detection using channel combining and correlation

A method and system for cooperative transmission power control in a communication system is provided. The method, operating within a system having a base station and at least on mobile station, includes the step of providing a power control data structure having memory fields indexed according to a predetermined parameter set. The next step retrieves from one of the memory fields a transmission power control value and adjusts a transmission power level of the mobile station according to the retrieved value.

Cooperative transmission power control method and system for CDMA communication systems

A high speed demodulator system is comprised of an analog to digital converter (ADC); a high speed demultiplexer connected to an input of the ADC; a bank of parallel programmable demodulators connected to an output of the high speed demultiplexer; a timing interface connected to the bank of parallel programmable demodulators; and a phase reference interface connected to the bank of parallel programmable demodulators and a data processor. A parallel programmable demodulator includes a reconfigurable FIR filter, has an input port for receiving digital input signals and an output coupled to a coherent signal processor and a coherent memory. The programmable FIR filter provides filtered signals to the coherent signal processor for storage in the coherent memory. The integrated circuit further includes a sequential weight processor having an input coupled to an output of the coherent memory. The sequential weight processor includes a weight memory and operates to output symbol soft decision data resulting from processing the digital input signals. The integrated circuit is programmable into one of a plurality of operating modes, including at least one of a received signal acquisition mode, a channel estimator mode, an adaptive equalizer mode, and a channel-wise differential mode.

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Salt Lake City, UT, United States of America

Lyman D Horne