U.S. Philips Corporation

Lydie Desperben

Hikmet Sari

Said Moridi

Georges Bonnerot

A circuit for recovering the carrier of a digitally modulated wave having a phase symmetry 2.pi./M, wherein M is the order of the symmetry, includes means for automatic and fast acquisition comprising a voltage-controlled oscillator having an output supplying said carrier and a control input to which an error signal .epsilon.(.phi.) is applied in order to change the oscillator phase and to adjust it to the phase of the digital modulated wave. This wave is introduced in two channels, one being in phase and the other being in quadrature with the carrier, each comprising the series arrangement of: a demodulator, a low-pass filter, reconstruction means for reconstructing a signal and for determining the error between the filtered and reconstructed signals, the quadrature channel comprising in addition a 90.degree. phase shifter, the two channels being joined together with the aid of a phase comparator arrangement which produces a comparison signal and a variable-rate sampling clock. With the representation of the signals from the in-phase and quadrature channels defining the states of a signal constellation of the modulated wave, the phase comparator arrangement comprises means for selecting received signal points with the aid of zones which are centered on or eccentric to certain diagonal states of the signal constellation, and means for generating the sampling clock by eliminating from a recovered symbol clock an active edge capable of validating zero crossings of the comparator signal which do not correspond to a phase difference equal to 2k.pi./M (k and M integers).

Circuit for recovering the carrier wave in digital transmission systems

A digital data receiving arrangement, which adapts itself to channel variations of a transmission system, comprises an adaptive receiver stage (11), having an adaptive equalizer and at least one sampler, and producing, at a certain rate, complex samples y.sub.k from the input signal x(t), a decision circuit (14) supplying detected complex samples a.sub.k and an adaptive timing recovery circuit (12) determining the optimal sampling instant by minimizing a quadratic function J which represents the difference between y.sub.k and a.sub.k. The adaptive timing recovery circuit comprises a device (121) for shaping a primary clock signal in accordance with a secondary clock signal, whose period is twice the period of the primary clock and whose consecutive ascending edges are spaced in time by T.sub.1 and T.sub.2, said secondary clock producing alternately two sampling instants .tau. and .tau.+.DELTA..tau.. By minimizing the function J, on the basis of the difference determined for two instants .tau..sub.k and .tau..sub.k +.DELTA..tau., the control of the timing recovery is defined for the consecutive sampling instants .tau..sub.k and .tau..sub.k+1.

Arrangement for receiving digital data comprising an arrangement for

An adaptive equalizer arrangement for digital transmission system comprises at the output of the transmission channel a first in-phase path and in parallel with this first path, a second quadrature path, both paths being of the non-recursive transversal filter type having n branches and (n-1) delay circuits between the inputs of these branches, each of these n branches comprising, arranged in series, a mixer, a low-pass filter, a multiplier, and having their outputs connected to an adder which is followed by a sampling circuit and thereafter by a comparator circuit to decide the symbols to be transmitted from the outputs of these paths. The arrangement also comprises a third control path which comprises two subtracting circuits to determine the differences between the signals before and after decision and a control circuit of a voltage-controlled oscillator, 2n phase shifters and 2n multipliers.

Growing community of inventors

Joinville, France

Lydie Desperben