Hewlett-packard Development Company, L.p.

Hewlett-packard Company

Samsung Electronics Co., Ltd.

Other

Lung T Tran

Manish Sharma

Thomas C Anthony

Frederick A Perner

Manoj K Bhattacharyya

Kenneth James Eldredge

Janice H Nickel

James A Brug

Andrew L Van Brocklin

Kenneth Kay Smith

James Robert Eaton

Heon Lee

Victor W Hesterman

Giora J Tarnopolsky

Ken Eldredge

Warren Bruce Jackson

Gary A Gibson

James William Stasiak

Zhizhang Chen

Steven Louis Naberhuis

Andrew Koll

Richard Lee Hilton

Robert J Davidson

Hardayal S Gill

Mark David Johnson

Robert C Walmsley

Kenneth I Eldredge

Peter J Frick

Ralph Simmons

The invention provides a printed circuit board (PCB) printing system. In a particular embodiment, the system includes a liquid electrophotographic printing device. At least one supplier of electrically conductive ink supplying electrically conductive ink to the electrophotographic printing device is also provided. In addition, at least one supplier of dielectric ink supplying dielectric ink to the electrophotographic printing device is also provided. The liquid electrophotographic printing device is operable to apply the electrically conductive ink and the dielectric ink to a provided substrate such that substantially immiscible boundary delineation occurs at any points of contact between the applied electrically conducive ink and the applied dielectric ink. An appropriate method of use for the rendering of a printed circuit board is also provided.

Printed circuit board printing system

Printed circuit board printing system and method using liquid electrophotographic printing

A display element includes a variable optical element that changes appearance in response to changes in current, and a programmable resistance in series with the variable optical element. The resistance of the programmable resistance decreases in response to a first current in a first direction. The resistance of the programmable resistance increases in response to a second current in a second direction.

Display device including variable optical element and programmable resistance element

An exemplary memory array including a plurality of memory cells, each of the memory cells comprises a first ferromagnetic layer, a second ferromagnetic layer spaced apart from the first ferromagnetic layer by a non-magnetic insulating layer and being magnetically coupled to the first ferromagnetic layer by demagnetizing fields from the first ferromagnetic layer, a spacer layer above the second ferromagnetic layer, and a reference layer above the spacer layer. The first ferromagnetic layer, non-magnetic insulating layer, and second ferromagnetic layer in combination function as a data layer of the memory cell.

Integrated circuit memory devices having magnetic memory cells therein that utilize dual-ferromagnetic data layers

An exemplary memory array including a plurality of memory cells, each of the memory cells comprises a first ferromagnetic layer, a second ferromagnetic layer spaced apart from the first ferromagnetic layer by a non-magnetic separating layer and being magnetically coupled to the first ferromagnetic layer by demagnetizing fields from the first ferromagnetic layer, a spacer layer above the second ferromagnetic layer, and a reference layer above the spacer layer. The first ferromagnetic layer, non-magnetic separating layer, and second ferromagnetic layer in combination function as a data layer of the memory cell.

Multi-layered magnetic memory structures

A method for making magnetic random access memories (MRAM) isolates each and every memory cell in an MRAM array during operation until selected. Some embodiments use series connected diodes for such electrical isolation. Only a selected one of the memory cells will then conduct current between respective ones of the bit and word lines. A better, more uniform distribution of read and data-write data access currents results to all the memory cells. In another embodiment, this improvement is used to increase the number of rows and columns to support a larger data array. In a further embodiment, such improvement is used to increase operating margins and reduce necessary data-write voltages and currents.

Increased magnetic memory array sizes and operating margins

A magnetic memory element is written to by heating the memory element and applying at least one magnetic field to the memory element.

Thermally-assisted switching of magnetic memory elements

An exemplary method for making a memory structure comprises forming a first ferromagnetic layer, forming a spacer layer above the first ferromagnetic layer, forming a second ferromagnetic layer above the spacer layer by applying a first deposition process to form a thin layer of ferromagnetic material substantially covering the spacer layer, the first layer being formed at a first energy level, and applying a second deposition process to form the remainder of the second ferromagnetic layer above the thin layer of ferromagnetic material, the second ferromagnetic layer being formed at a second energy level, higher than the first energy level. This way, the spacer layer is protected by the thin layer during the second energy level deposition.

Process for forming magnetic memory structures

The invention includes a stacked magnetic memory structure. The magnetic memory structure includes a stacked magnetic memory structure. The first layer includes a first plurality of magnetic tunnel junctions. A second layer is formed adjacent to the first layer. The second layer includes a second plurality of magnetic tunnel junctions. The stacked magnetic memory structure further includes a common first group conductor connected to each of the first plurality of magnetic tunnel junctions and the second plurality of magnetic tunnel junctions.

Magnetic memory structure using heater lines to assist in writing operations

An information storage device is provided. The information storage device may be a magnetic random access memory (MRAM) device including a resistive cross point array of spin dependent tunneling (SDT) junctions or magnetic memory elements, with word lines extending along rows of the SDT junctions and bit lines extending along the columns of the SDT junctions. The present design includes a plurality of heating elements connected in series with associated magnetic memory elements, each heating element comprising a diode. Voltage applied to a magnetic memory element and associated heating element causes reverse current to flow through the diode, thereby producing heat from the diode and heating the magnetic memory element, thereby facilitating the write function of the device.

Series diode thermally assisted MRAM

A data storage device includes a cross point array of resistive memory elements and a plurality of blocking elements. The device is arranged in groups. Each group includes series-connected memory elements and a blocking element. The blocking elements are used to prevent sneak path currents from interfering with sense currents during read operations.

Magnetic memory device including groups of series-connected memory elements

A resistive cross point array memory device comprising a plurality of word lines extending in a row direction, a plurality of bit lines extending in a column direction such that a plurality of cross points is formed at intersections between the word and bit lines, and at least one memory element formed in at least one of the cross points. The memory element comprises a first tunnel junction having a bottom conductor, a top conductor, a barrier layer adjacent the bottom conductor, and wherein the bottom conductor comprises a non-uniform upper surface.

Resistive memory device and method for making the same

A method of performing a thermally assisted write operation on a selected two conductor spin valve memory (SVM) cell having a material wherein the coercivity is decreased upon an increase in temperature. In a particular embodiment, a first write magnetic field is established by a first write current flowing from a first voltage potential to a second voltage potential as applied to the first conductor. A second write magnetic field is established by a second write current flowing from a third voltage potential to a fourth voltage potential as applied to the second conductor. The voltage potential of the first conductor is greater than the voltage potential of the second conductor. As a result, a third current, flows from the first conductor through the SVM cell to the second conductor. The SVM cell has an internal resistance such that the flowing current generates heat within the SVM cell. As the SVM cell is self heated, the coercivity of the SVM cell falls below the combined write magnetic fields.

Two conductor thermally assisted magnetic memory

A storage device comprising a magnetic storage medium mounted in a first plane, a read and write mechanism mounted in a second plane that is parallel to the first plane and configured to write information to the magnetic storage medium, and a micromover configured to move the magnetic storage medium in a first direction parallel to the first plane and configured to move the magnetic storage medium in a second direction parallel to the first plane and perpendicular to the first direction.

Micromover configured to move a magnetic storage medium in perpendicular directions in a plane

Methods and apparatuses are disclosed for retrieving data stored in a magnetic integrated memory. In one embodiment, the method includes applying a perturbing hard-axis magnetic field to a magnetic element in a magnetic integrated memory and detecting a change in an electrical parameter caused by said perturbing hard-axis magnetic field.

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Saratoga, CA, United States of America

Lung T Tran