Chengdu Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Lulu Yang

Xiaofeng Jiang

Tinghua Shang

Xin Zhang

Huijun Li

Yi Qu

Yupeng He

Huijuan Yang

Meng Zhang

Siyu Wang

Yang Zhou

Yu Wang

Hao Zhang

Lu Bai

Yi Zhang

Tingliang Liu

Jie Dai

Pengfei Yu

Linhong Han

Mengqi Wang

Xiangdan Dong

Wei Wang

Xin Li

Haigang Qing

Shun Zhang

Hongwei Ma

Yan Huang

Mengmeng Du

Qiang Huang

Qun Ma

Biao Liu

Junxi Wang

Yiyang Zhang

Guomeng Zhang

Zhengwei Luo

Bin He

Pu Liu

Liudong Zhu

Rui Hao

Jiaming Lu

Dinan Duan

Haiyong Bai

Ruiqi Wei

Guanghui Yang

Ming Hu

Chang Luo

Yongjie Song

A display substrate is provided, including: a base substrate including at least pixel and hole areas; sub-pixels arranged on the base substrate and in the pixel area; a hole in the hole area; a first barrier dam between the sub-pixels and the hole and at least partially surrounding the hole; a functional film layer, an organic material layer and an encapsulating structure sequentially arranged on the display substrate in a direction away from the base substrate, an orthographic projection of the organic material layer on the base substrate falling within the pixel area, the organic material layer including at least one film layer; and a filling structure, at least a portion of which is arranged between the hole and the first barrier dam. The filling structure and the at least one film layer of the organic material layer are in the same layer and include the same material.

Display substrate and display device

A display substrate includes: a base substrate including a display region and a non-display region surrounding the display region; a plurality of sub-pixels in the display region; a plurality of power lines in the display region, the plurality of power lines extending along a first direction, and being electrically connected to the plurality of sub-pixels and being configured to provide power signals for the plurality of sub-pixels; a plurality of dummy sub-pixels in the non-display region on one side of the display region along the first direction; and a plurality of dummy power lines in the non-display region, the plurality of dummy power lines extending along the first direction, the plurality of dummy power lines and the plurality of dummy sub-pixels being on the same side of the display region.

A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels on the base substrate. Each sub-pixels includes a pixel circuit. The plurality of sub-pixels include a first sub-pixel. The compensation sub-circuit of the first sub-pixel includes a first electrode, a second electrode, and a connection portion between the first electrode and the second electrode. The first drive electrode of the light-emitting element of the first sub-pixel includes a first main body portion including a first side parallel to a certain direction, and a first protruding portion protruding from the first side of the first main body portion. The first protruding portion at least partially overlaps with the connection portion of the compensation sub-circuit of the first sub-pixel in a direction perpendicular to the base substrate. The light-emitting element of the first sub-pixel is configured to emit green light.

A display substrate, including a base substrate, and a driving circuit layer and light emitting elements formed on the base substrate, and in a same pixel circuit, an active general layer includes a first column-wise active portion including active layers of a data writing transistor and a first light emission control transistor, and a first active connection portion, an orthographic projection of the first active connection portion on the base substrate at least partially overlapping an orthographic projection of a corresponding power supply line on the base substrate, a dimension of the first active connection portion in a row direction of the pixel units less than a dimension of the active layer of the data writing transistor in the row direction, and a dimension of the active layer of the first light emission control transistor in the row direction. A display panel is further provided.

Display substrate and display panel

Provided is a display substrate. A base substrate includes a display region (), a binding region located on one side of the display region (), and a first peripheral region () located between the display region and the binding region. The display region () comprises multiple display units. A power line () is disposed in the first peripheral region () of the base substrate, and is electrically connected to the display units. An organic insulating layer is disposed on the side of the power line away from the base substrate. In the first peripheral region (), the organic insulating layer includes at least two organic grooves and an isolation dam () disposed between every two adjacent organic grooves, and the organic grooves penetrate through the organic insulating layer.

Display substrate and manufacturing method therefor, and display device

Disclosed are a display panel and a display device. The display panel comprises: a base substrate, a plurality of scanning lines, a first insulating layer, a plurality of data lines, an interlayer insulating layer, and an auxiliary power line. The auxiliary power line comprises: a plurality of sub-auxiliary power lines and a plurality of auxiliary conduction lines; the plurality of sub-auxiliary power lines are arranged in a first direction and extend in a second direction, and two sub-auxiliary power lines that are at least partially adjacent are electrically connected by means of at least one auxiliary conduction line; the orthographic projection of at least one of the plurality of auxiliary conduction lines on the base substrate does not overlap the orthographic projections of the scanning lines on the base substrate.

Display panel and display device

An array substrate is provided. The array substrate includes a gate line; a data line; a voltage supply line; and a pixel driving circuit. The pixel driving circuit includes a plurality of transistors and a storage capacitor. The storage capacitor includes a first capacitor electrode, a second capacitor electrode, and an insulating layer between the first capacitor electrode and the second capacitor electrode. The second capacitor electrode is electrically connected to the voltage supply line. The second capacitor electrode includes a first portion and a second portion as parts of a first unitary structure in a respective subpixel. The voltage supply line crosses over the first portion by a first crossing-over distance. The data line crosses over the second portion by a second crossing-over distance. The first crossing-over distance is greater than the second crossing-over distance.

Array substrate and display apparatus

A display substrate and a display device are provided. The display substrate includes a base substrate, a pixel circuit layer and an anode layer; the pixel circuit layer includes a plurality of pixel driving circuits, the anode layer includes a plurality of anode groups, each of the plurality of anode groups includes a first anode and a second anode which are oppositely arranged, the first anode includes a first main body portion and a first connection portion, the first anode further includes an extension portion and an anode compensation portion, an orthographic projection of the anode compensation portion on the base substrate covers one thin film transistor in the pixel driving circuit connected to the first connection portion.

A display substrate, a manufacturing method thereof, and a display device are provided. A pixel region is provided with a light emission function layer on a base substrate of the display substrate, and a separation region is provided with at least one first barrier structure. The first barrier structure includes a stopper pattern and a first separation component. A side surface of the first separation component has a recess, and a portion of the light emission function layer extending to the separation region is disconnected on the side of the first separation component. The separation region is provided with an inorganic layer structure on the base substrate. The inorganic layer structure includes multiple stacked inorganic film layers, the stopper pattern is located between two adjacent inorganic film layers and the first separation component is located on a side of the inorganic layer structure away from the base substrate.

Display substrate and method for manufacturing the same, display device

The display substrate includes a substrate, multiple sub-pixels, multiple data lines, multiple power lines, multiple data signal input lines, multiple selector switches, a first power bus located in a peripheral area and on a side, facing away from the display area, of the multiple selector switches, and multiple power connection cables located in the peripheral area and between the first power bus and the multiple power lines. The multiple power connection cables are electrically connected with the first power bus and the multiple power lines.

A display panel, a method of manufacturing the display panel and a display device are provided in the present disclosure. The display panel includes: a substrate, a functional film layer arranged on the substrate, a first bending region capable of being bent along a first direction, a second bending region capable of being bent along a second direction, and a third bending region located between the first bending region and the second bending region. The first direction intersects the second direction. The functional film layer includes a non-hollowed region located in at least one of the first bending region and the second bending region, and a part of the functional film layer located in the third bending region includes a plurality of functional via holes spaced from each other.

Display panel, method of manufacturing the same and display device

An array substrate is provided. The array substrate includes a gate line extending along a first direction. The gate line includes a plurality of wide portions and a plurality of narrow portions respectively arranged along the first direction, the plurality of wide portions having a first dimension greater than a second dimension of the plurality of narrow portions along a second direction, the second direction at an angle in a range of 80 degrees to 100 degrees with respect to the first direction. An orthographic projection of a respective one of the plurality of wide portions in the respective subpixel on the base substrate overlaps with an orthographic projection of a portion of the semiconductor material layer in the respective subpixel on the base substrate, forming an active layer of the data-write transistor in the respective subpixel.

The array substrate is provided and includes a substrate, a test unit area, first and second flat layers and a terminal area including an input and output terminal areas, the input terminal area includes input terminals for connecting input pins of a driving chip, and the output terminal area includes output terminals for connecting output pins of the driving chip, and each of the input and output terminals includes a second metal layer and a third metal layer disposed on a side of the second metal layer away from the substrate; the second flat layer on a side of the third metal layer away from the substrate and covering edges of the third metal layer; a surface of the first flat layer away from the substrate is not higher than a surface of the second flat layer away from the substrate, in a thickness direction of the substrate.

Array substrate and display panel including stacked metal layer test unit area

A display area of the array substrate only includes first sub-pixels capable of emitting light. In each two adjacent rows of first sub-pixels, a gate line electrically connected to one row of the plurality of rows of first sub-pixels and a reset signal line electrically connected to another row of the plurality of rows of first sub-pixels are electrically connected to the same first gate drive circuit. A target line electrically connected to a first row of the plurality of rows of first sub-pixels (i.e., another line other than the line electrically connected to the first gate drive circuit) is electrically connected to a second gate drive circuit. A target line electrically connected to a last row of the plurality of rows of first sub-pixels (i.e., another line other than the line electrically connected to the first gate drive circuit) is electrically connected to a third gate drive circuit.

Array substrate, display panel and display device

A display substrate and a display device are disclosed. The display substrate includes a base substrate, a pixel circuit layer, and an anode layer; the pixel circuit layer includes a plurality of pixel driving circuits; and the anode layer includes a plurality of anode; each pixel driving circuit includes a functional thin film transistor; the plurality of pixel driving circuits include a first pixel driving circuit and a second pixel driving circuit which are adjacently arranged, and an orthographic projection of a channel region of the functional thin film transistor in the first pixel driving circuit on the base substrate and an orthographic projection of a channel region of the functional thin film transistor in the second pixel driving circuit on the base substrate both overlap with an orthographic projection of the anode corresponding to the first pixel driving circuit on the base substrate.

Display substrate and display device with long-term light emission stability

Growing community of inventors

Beijing, China

Lulu Yang