Boe Technology Group Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Hefei Boe Joint Technology Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Luke Ding

Bin Zhou

Jingang Fang

Jun Feng Liu

Liangchen Yan

Wei Li

Leilei Cheng

Zhanfeng Cao

Dongfang Wang

Yongchao Huang

Yongqian Li

Ning Liu

Ce Zhao

Qi Yao

Yang Zhang

Can Yuan

Zhidong Yuan

Cheng Xu

Qinghe Wang

Yingbin Hu

Jun Liu

Xiangchun Kong

Liu Wu

Zhen Liu

Bin Zhang

Jun Cheng

Xing Yao

Zhengliang Li

Miao Liu

Guangyao Li

Guanbao Hui

Yuankui Ding

Xiuting Liu

Guangcai Yuan

Feng Zhang

Min He

Haitao Wang

Tongshang Su

Wei Song

Wenlin Zhang

Binbin Cao

Bing Jiang Sun

Biao Luo

Xuehai Gui

Jun Bao

Zhixing Zhang

Disclosed are a display panel, a manufacturing method therefor, and a display apparatus. The display panel comprises: a base substrate (); a padding layer () arranged at one side of the base substrate (); a thin film transistor structure layer () arranged at one side of the base substrate (); a planar layer () arranged at the side of the thin film transistor structure layer () away from the base substrate (); an organic electroluminescent device () arranged at the side of the planar layer () away from the base substrate (), the organic electroluminescent device () comprising an anode (), an effective light emission layer (), and a cathode () in a layered arrangement; an auxiliary electrode () arranged on the side of the thin film transistor structure layer () away from the base substrate (); and an ineffective light emission layer ().

Display panel, manufacturing method therefor, and display apparatus

A display substrate and a display device are provided. The display substrate includes a light emitting element disposed on a base substrate, and an encapsulation layer, a connection layer, a light extraction layer, a polarization conversion layer and a polarization layer stacked sequentially at a light exiting side of the light emitting element. The light extraction layer is configured to convert at least a portion of light emitted by the light emitting element incident onto the light extraction layer into circularly polarized light with a set rotational direction to pass through the light extraction layer. The polarization conversion layer is configured to convert the circularly polarized light passing through the light extraction layer into linearly polarized light, with a polarization direction parallel to a direction of a light transmission axis of the polarization layer; the connection layer is configured to bond the light extraction layer to the encapsulation layer.

Display substrate and preparation method therefor, and display apparatus

Provided is a gate driver circuit. The gate driver circuit is applicable to a display panel, wherein the display panel includes a plurality of rows of pixels; the gate driver circuit including at least one gate driver sub-circuit; wherein the gate driver sub-circuit includes: at least two shift register groups, wherein each shift register group includes a plurality of shift register units; at least two first dummy units, wherein the at least two first dummy units are respectively coupled to a same input enable terminal and the at least two shift register groups; and at least two second dummy units, wherein the at least two second dummy units are coupled to the at least two shift register groups.

Gate driver circuit and method for driving same, and display device

A display substrate, including: a plurality of partition control signal lines disposed on a base substrate; and a plurality of sub-pixels disposed on the base substrate, at least one of the sub-pixels includes a pixel circuit and a light emitting device. The pixel circuit includes a switch transistor, a first partition control transistor, a drive transistor and a first initialization transistor. The first partition control transistor is electrically connected to the switch transistor, the first initialization transistor, the drive transistor and at least one partition control signal line. The first partition control transistor is configured to: in response to a partition control signal on the partition control signal line, selectively transmit a received first initialization signal to a gate electrode of the drive transistor in an initialization phase, and selectively transmit a received data signal to the gate electrode of the drive transistor in a data writing phase.

Display substrate and method of driving the same, display panel and display device

A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.

Display substrate and display apparatus

A manufacturing method of a display substrate, a display substrate, and a display device. The manufacturing method includes: forming an active layer; forming a gate insulation film layer, a gate film layer and a photoresist film layer; exposing the photoresist film layer to a light and developing the exposed photoresist film layer until the developed photoresist film layer has a thickness of 1.8-2.2 μm and a slope angle not less than 70°; over-etching the gate film layer to form a gate electrode, an orthographic projection of the gate electrode being located within a region of an orthographic projection of the developed photoresist film layer; over-etching the gate insulation film layer by a gaseous corrosion method to form a gate insulation layer; peeling off the photoresist film layer remaining on a surface of the gate electrode; and performing a conductive treatment to the active layer.

Manufacturing method of display substrate, display substrate and display device

The present disclosure relates to the technical field of display, and discloses an array substrate, a preparation method therefor, and a display device. When dielectric layers, such as a buffer layer, an interlayer dielectric layer, and a gate insulation layer, are formed between a source-drain electrode and a substrate, the thickness of at least one dielectric layer among said dielectric layers underneath a first through hole for connecting a drain electrode and an anode is increased, which is to say that the drain electrode is raised to be further away from the substrate, causing the drain electrode to be closer to a surface of a planarization layer that faces away from the substrate, i.e., reducing the thickness of a portion of the planarization layer above the drain electrode.

Array substrate, preparation method therefor, and display device

A sterilization structure, a sterilization board, and a display device are disclosed. The sterilization structure includes an active layer, wherein, one surface of the active layer has an exposed region, and a material of the active layer includes a laser-induced graphene material.

Sterilization structure, sterilization board and display device

A method of manufacturing an array substrate is provided, which comprises: forming a first metal layer and an insulating layer in sequence on a base substrate, the insulating layer covering the first metal layer; forming an etch barrier layer on the insulating layer; etching the etching barrier layer and the insulating layer multiple times, wherein an effective blocking area of the etching barrier layer decreases successively in each etching to form a connection hole penetrating the insulating layer, the connection hole includes a plurality of via holes connected in sequence, and a slope angle of a hole wall of each via hole is smaller than a preset slope angle; and forming a second metal layer, the second metal layer being connected to the first metal layer through the connection hole.

Method of manufacturing array substrate, and array substrate

An array substrate includes an insulation layer and one or more stepped holes each penetrating through the insulation layer in a direction perpendicular to the insulation layer. Each stepped hole includes a first hole and a second hole under the first hole, a radius of the first hole at a bottom is a first radius, a radius of the second hole at a top is a second radius which is substantially smaller than the first radius, and a difference between the first radius and the second radius is 0.2 &#x3bc;m to 0.6 &#x3bc;m.

Array substrate, display panel, and manufacturing method of the array substrate

Provided are a display panel and a manufacturing method thereof and a display device. The display panel includes a substrate and pixel units formed on the substrate, wherein, along a thickness direction of the display panel, at least one of the pixel units includes a driving and light filtering structure and a light emitting element formed at a side of the driving and light filtering structure facing away from the substrate, and wherein the driving and light filtering structure includes a driving part and a light filtering part, and the light filtering part is disposed in an accommodating hole penetrating through an insulating layer in the driving part along the thickness direction.

Display panel and manufacturing method thereof, and display device

The disclosure relates to a thin film transistor structure, an array substrate, and a method for manufacturing a thin film transistor structure. The thin-film transistor structure includes a base substrate, a thin film transistor on the base substrate. Wherein the thin film transistor includes an active layer and a source/drain electrode on a side, facing towards the base substrate, of the active layer. Wherein the source/drain electrode has a protrusion protruding from an edge portion of the active layer in a direction parallel to a surface of the base substrate.

Thin film transistor structure, array substrate and method for manufacturing a thin film transistor structure

The disclosure provides a thin film transistor, an array substrate, and a method for fabricating the same. An embodiment of the disclosure provides a method for fabricating a thin film transistor, the method including: forming a gate, a gate insulation layer, and an active layer above an underlying substrate successively; forming a patterned hydrophobic layer above the active layer, wherein the hydrophobic layer includes first pattern components, and orthographic projections of the first pattern components onto the underlying substrate overlap with a orthographic projection of a channel area at the active layer onto the underlying substrate; and forming a source and a drain above the hydrophobic layer, wherein the source and the drain are located respectively on two sides of a channel area, and in contact with the active layer.

Thin film transistor, array substrate, and method for fabricating the same

A display substrate, a method for manufacturing the same, and a display device are disclosed. The display substrate includes: a base substrate; and a conductive pattern, a first insulating layer and a conductive layer laminated on the base substrate, wherein the first insulating layer has a plurality of first via holes, and the conductive layer includes a signal line, the signal line being electrically connected to the conductive pattern through the plurality of first via holes. The present disclosure may achieve efficient transmission of signals and ensure the display effect of the display device.

Display substrate including signal line electrically connected to conductive pattern through the plurality of via holes

The present disclosure is in the field of display technologies, and provides an array substrate including an IGZO film layer, a gate layer, and a gate insulating layer. The gate layer is provided with broken lines at a position thereof overlapping the IGZO film layer to form a first gate line and a second gate line. The gate insulating layer is disposed between the IGZO film layer and the gate layer, and is provided with at least two through holes thereon, in which the first gate line is connected with the IGZO film layer through one of the through holes, and the second gate line is connected with the IGZO film layer through another through hole, thus, connecting the IGZO film layer in series into the gate layer.

Array substrate and fabricating method thereof, display panel and display device

Growing community of inventors

Beijing, China

Luke Ding