Nxp USA, Inc.

Nxp B.v.

Nxa USA, Inc.

Lukas Vaculik

Ivan Sieklik

Radek Holis

Michael Rohleder

Martin Mienkina

Radomir Kozub

Vaclav Halbich

Ludek Slosarcik

Petr Spacek

Karel Povalac

Petr Gargulak

Stanislav Arendárik

Jan Tomecek

A power-meter includes a digital signal processor (DSP) configured to determine a respective consumed energy within each of a plurality of predetermined contiguous time intervals, a dequantizer, and a pulse generator. The dequantizer is configured to, for each time interval, determine a sum of a remainder and the consumed energy, calculate an integer pulse-count by dividing the sum of the remainder and the consumed energy by a predetermined pulse-quantum, calculate a new remainder by subtracting the product of the integer pulse-count and the pulse-quantum from the sum, and replace the remainder by the new remainder The pulse generator is configured to, for each time interval, generate the integer pulse-count number of pulses of an indicator signal.

Power-meter apparatus, circuits and methods

A controller for a power converter includes a generator module which generates a sequence of pulses each having a width defined by a rise moment and fall moment stored in respective RM and FM registers. The sequence of pulses have a repetition rate that is modulated by a repetition period value stored in a RP register. A memory of the controller has tables of rise moment values, fall moment values and repetition period values configured to be written into the RM, FM and RP registers respectively. A direct memory access (DMA) module of the controller is configured to write rise moment, fall moment, and repetition period values from the respective memory table into the RM, FM, and RP registers respectively, in response to a DMA trigger. A core coupled to the DMA module is configured to write the rise moment, fall moment, and repetition period values into the memory tables.

Controller for a power converter and a method of controlling a power converter

A system and method is disclosed, to generate an AC signal having a positive and negative half-cycles, each comprising a plurality of PWM pulses each with an individually designated pulse width, the system comprising: a first clock circuit; a second, faster, clock circuit; clock ratio measurement circuitry configured to output a first measurement being a ratio of frequencies; a propagation delay circuit configured to measure a number of propagation elements through which a bit transition propagates within a second clock signal period; pulse data calculation element configured to determine pulse shaping data; and for each of the half-cycles, a respective pulse synthesis circuit configured to synthesise the respective plurality of PWM pulses, each pulse having a respective start defined by the first clock signal, and a pulse width defined by the pulse shaping data and synthesised from the second clock and an output pulse from the propagation delay circuit.

Systems and methods for pulse width modulation shaping

Duty cycles of pulse width modulation ('PWM') pulses are determined by measurements taken with respect to an internally generated clock signal. One of these measurements calculates, in a continuous dynamic manner, a ratio of the number of cycles of the internally generated clock signal to one or more cycles of a PWM clock signal utilized as a time base for generation of the PWM pulses. This clock ratio measurement designates how many cycles of the internally generated clock signal will be used to designate a first portion of a duty cycle for each PWM pulse. Another measurement is utilized to determine a fractional portion of a cycle of the internally generated clock signal that will be used to designate a second portion of the duty cycle for each PWM pulse.

High frequency pulse width modulation shaping

A controller for generating a sequence of pulse is disclosed. The controller includes a plurality of pulse width modulation (PWM) modules. Each PWM Module configured to generate a first sequence of pulses and a second sequence of pulses each having a width that is modulated by a PWM value stored in a PWM register of the PWM module. Each PWM module includes two outputs. The first sequence of pulses is outputted on the first output and the second sequence of pulses is outputted on the second output. The controller also includes a memory having a plurality of memory tables and a plurality of direct memory access (DMA) modules. Each memory table configured to store PWM values to be written into the PWM register and each DMA module is coupled to a respective PWM module in the plurality of PWM modules and to a respective memory table in the plurality of memory tables and configured to write a PWM value from the memory table into the PWM register in response to a DMA trigger. The controller further includes a core coupled to the plurality of memory tables and configured to write the PWM values into the plurality of memory tables.

Wireless charging pulse generator

Embodiments of a method and device are disclosed. In an embodiment a controller is disclosed. In an embodiment, the controller includes a pulse width modulation (PWM) module configured to generate a sequence of pulses each having a width that is modulated by a PWM value stored in a register of the PWM module, a memory having a table of PWM values configured to be written into the PWM module register, a direct memory access (DMA) module coupled to the PWM module and to the memory table and configured to write a PWM value from the memory table into the PWM register in response to a DMA trigger, and a core coupled to the DMA module and configured to write the PWM values into the memory table.

Controller-based variable duty cycle pulse width modulation

An electric power meter for measuring electric power is provided. The power meter has a frequency domain converter arranged to convert a sequence of digital voltage samples from the time domain to a frequency domain obtaining digital voltage frequency components, and to convert a sequence of digital current samples from the time domain to the frequency domain obtaining digital current frequency components. The electric power meter also has a frequency domain correction unit arranged to correct the voltage frequency components and the current frequency components by multiplying at least one frequency component of the current frequency components and the voltage frequency components with a complex correction factor using a complex multiplication unit. Electric power is computed by an energy calculation unit.

Electric power meter

There is provided an energy consumption meter device comprising including a processor arranged to receive input data from the sampling unit. The processor calculates at a calculation step [n] an energy contribution value using &#x394;E using a sampled voltage value and a sampled current value. The processor will calculate an energy value E[n] using a reminder value which was calculated at a previous calculation step [n&#x2212;1]. The processor will then calculate a relative delay Td' using the threshold value, the reminder value and the energy value, and generate an output pulse at an output time tpulse which is delayed for the relative delay Td&#x2032; with respect to the calculation time step[n]. By delaying the output pulse with a value which is a closest proximity of Td, the cycle-by-cycle jitter is less or equal to the clock frequency of the timer tclk.

Low jitter pulse output for power meter

A method, apparatus, and energy metering system obtains mains samples of a mains power line signal, performs non-white noise (NWN) filtering of the mains power line signal, obtains adjustable clock source samples of an adjustable clock signal of an adjustable clock oscillator, determines a difference based on the mains samples and the adjustable clock source samples, adjusts an adjustable clock source frequency of the adjustable clock oscillator based on the difference, and applies the adjustable clock source frequency to an analog to digital converter (ADC) to determine a conversion rate of the ADC.

Conversion rate control for analog to digital conversion

A signal adaptive filtering technique for recognizing touch and release events as indicated from a measured capacitance signal received from a capacitive touch sensor device in order to improve electromagnetic noise immunity, event detection responses, adaptability to dynamically changing environments, and adaptability to signal sensitivity changes and signal offset over an extended period of time. A capacitive touch sensor system may include one or more capacitive touch sensor devices, each sending a measured capacitance signal that outputs a baseline capacitance signal during a release event, and outputs an increased capacitance signal during a touch event. The system updates the baseline capacitance signal with a filter, wherein a transfer function of the filter varies as a function of a current state of the capacitive touch sensor device, determines a range of capacitance values calculated from the baseline capacitance signal in which a recognition of the touch event will not be performed, creates a predicted signal from a filtered version of the measured capacitance signal, and recognizes a touch or release event from a comparison of the measured capacitance signal to the predicted signal.

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Valasske Mezirici, Czechia

Lukas Vaculik