Intel Corporation

California Institute of Technology

Lukas M Baumgartel

Oleg Golonzka

Jeffrey S Leib

Dax M Crum

Dan S Lavric

Daniel B O'Brien

Tahir Ghani

Matthew V Metz

Florian Gstrein

Rami Hourani

Christopher J Wiegand

Szuya S Liao

Scott Bruce Clendenning

Daniel B Bergstrom

Daniel Ouellette

Jessica M Torres

Martin M Mitan

Nan Yu

Orb Acton

Kiran Chikkadi

Ivan S Grudinin

Diane Lancaster

Timothy Michael Duffy

Gate-all-around integrated circuit structures having molybdenum nitride metal gates and gate dielectrics with a dipole layer are described. For example, an integrated circuit structure includes a first vertical arrangement of horizontal nanowires, and a second vertical arrangement of horizontal nanowires. A first gate stack is over the first vertical arrangement of horizontal nanowires, the first gate stack having a P-type conductive layer on a first gate dielectric. The P-type conductive layer includes molybdenum and nitrogen. A second gate stack is over the second vertical arrangement of horizontal nanowires, the second gate stack having an N-type conductive layer on a second gate dielectric.

Fabrication of gate-all-around integrated circuit structures having molybdenum nitride metal gates and gate dielectrics with a dipole layer

Self-aligned gate endcap (SAGE) architectures without fin end gaps, and methods of fabricating self-aligned gate endcap (SAGE) architectures without fin end gaps, are described. In an example, an integrated circuit structure includes a semiconductor fin having a cut along a length of the semiconductor fin. A gate endcap isolation structure has a first portion parallel with the length of the semiconductor fin and is spaced apart from the semiconductor fin. The gate endcap isolation structure also has a second portion in a location of the cut of the semiconductor fin and in contact with the semiconductor fin.

Self-aligned gate endcap (SAGE) architectures without fin end gap

Disclosed herein are structures, methods, and assemblies related to metallization in integrated circuit (IC) structures. For example, in some embodiments, an IC structure may include a first nanowire in a metal region and a second nanowire in the metal region. A distance between the first nanowire and the second nanowire may be less than 5 nanometers, and the metal region may include tungsten between the first nanowire and the second nanowire.

Metallization in integrated circuit structures

A method for fabricating a resonator structure, comprising engineering dispersion of electromagnetic radiation guided along a boundary of an axially symmetric substrate, the engineering comprising micro-structuring a geometry of the boundary, wherein the structure defines a waveguide for electromagnetic radiation.

Method of engineering the dispersion of whispering gallery mode resonators and the resonators with dispersion engineered by the method

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Portland, OR, United States of America

Lukas M Baumgartel