Infineon Technologies Ag

Intel Corporation

Apple Inc.

Lukas Doerrer

Patrick Torta

Andreas Wiesbauer

Mario Motz

Franz Kuttner

Markus Schimper

Antonio Di Giandomenico

Matteo Camponeschi

Patrizia Greco

Francesco Conzatti

Luca Sant

Andrea Fant

Marco Bresciani

Antonio Digiandomenico

Claus Kropf

An active filter and an analog-to-digital converter (ADC) configured to suppress out-of-band peaking. An active filter may include an active device configured to provide a power gain to an input signal, a feedback network configured to connect an output of the active device to an input of the active device, and an input impedance network configured to couple the input signal to the input of the active device. A combination of the feedback network and the input impedance network is configured to provide frequency response properties of the active filter such that a frequency domain signal transfer function of the active filter has a constant in numerator.

Active filter configured to suppress out-of-band peaking and an analog-to-digital converter using the same

Methods adapted for digital-to-analog conversion compensation and systems are described. In a compensation method, inputs of a digital-to-analog converter (DAC) are adjusted to provide an even number inputs for the DAC. Further, one or more analog input signals are converted to generate one or more corresponding digital output signals. The one or more digital output signals are compensated to compensate for the adjustment of the inputs of the DAC.

Offset system and method for multi-bit digital-to-analog converters

Some embodiments of the invention relate to a DC offset correction circuit comprising a feedback loop having a DAC controlled by a reconfigurable ADC, which determines (e.g., tracks) the mean value of a modulated input signal. The circuit operates according to two phase process. In a first 'pre-modulation' tracking phase, an input signal is tracked by the ADC, which is configured to output the input signal's mean value as a digital code equivalent to the input mean value. The output of the ADC is provided to a DAC, which provides an analog representation of the mean value to an adder that subtracts the mean value from the modulated input signal to generate a bipolar adjusted input signal. In a second 'modulation' phase, the estimated mean value is held constant, so that the bipolar adjusted input signal may be provided to an activated modulation circuit for improved system performance.

Configurable system for cancellation of the mean value of a modulated signal

A receiver circuit for receiving an analog signal comprises a mixer device, a first integrator device coupled to the mixer device, a second integrator device following the first integrator device, a quantizer device, and first and second feedback digital/analog converters. The mixer device mixes the analog signal with a local-oscillator frequency and outputs a mixer current signal. The first integrator device generates a first intermediate signal by integrating the mixer current signal summed with a first feedback current signal, the second integrator device generates a quantizer input signal by integrating the first intermediate signal summed with a second feedback current signal, and the quantizer device generates a digital output signal by quantizing the quantizer input signal. The first feedback digital/analog converter converts the digital output signal into the first feedback current signal and the second feedback digital/analog converter converts the digital output signal into the second feedback current signal.

Receiver circuit

This disclosure relates to techniques and architecture for summing, sampling, and converting signals associated with a capacitive feedforward filter using a quantizer.

Filter with capacitive forward coupling

In a method for starting a circuit arrangement an output signal of a circuit arrangement with interlinked feedback control circuits is utilized as a control variable for the feedback control circuits and an input signal for the circuit arrangement is damped for a predetermined time period during a starting phase of the circuit arrangement.

Starting circuit and method for the stable starting of a circuit arrangement with plural feedback control circuits

Processing signals of a capacitive feedforward filter

Filter with capacitive forward coupling with a quantizer operating in scanning and conversion phases

The invention relates to a power-saving multibit delta-sigma converter () comprising: an input () for an analog input signal (ZA) and an output () for a digital output signal (ZD); a digital-to-analog converter () having a bit width N and serving to convert the digital output signal (ZD) to an analog feedback signal (Z); a summing device () for solving the difference between the input signal (ZA) and the feedback signal (Z); a filter () for filtering the difference signal (Z); and a clocked quantizing device () for quantizing the filtered difference signal (Z) into a digital output signal (ZD) with the bit width N. Said quantizing device () comprises a number of comparators () that compare the filtered signal (Z) with a respective reference potential (UU) associated with each comparator () and they each output a comparison result (VVV) to a decoder (), which generates the digital output signal (ZD) from the comparison results (VVV), and the reference potentials (U. . . U) are updated according to a previous comparison result.

Power-saving multibit delta-sigma converter

A multi-bit sigma/delta converter for converting an analog input signal into a digital output signal comprises a filter device for filtering the analog input signal which is added to a feedback signal to form an intermediate signal. An integrator device for integrating the filtered intermediate signal added to an inner feedback signal forms a quantizer input signal. A quantizer device quantizes the quantizer input signal to form the digital output signal. An inner feedback digital/analog converter is provided for converting the digital output signal directly into the inner feedback signal. A DEM device for performing dynamic element matching on the digital output signal and providing a matched digital signal is provided and a feedback digital/analog converter for converting the matched digital signal into the feedback signal is implemented.

Multi-bit sigma/delta converter

The control apparatus (') is used to dynamically assign N individual references to N individual comparators of a quantizer in a sigma-delta analogue/digital converter, the control apparatus (&#x2032;) generating a digital control signal (&#x2032;). The control apparatus (&#x2032;) has a storage means () for providing the value of the control signal (&#x2032;) at the time k&#x2212;1, and a summation means () for summing the output signal Y of the quantizer with the stored value of the first control signal (&#x2032;) at the time k&#x2212;1.

Control apparatus and method for scrambling the assignment of the references of a quantizer in a sigma-delta analogue/digital converter

A sigma-delta converter is disclosed. In one embodiment, the sigma-delta converter includes two series-connected converter stages which are each supplied with a feedback signal, a comparator stage which is connected downstream of the second converter stage, which is supplied with the output signal from the second converter stage and which provides an at least two-value comparator signal, and at least one output stage which has at least one digital integrator and which produces a multibit signal as output signal. The sigma-delta converter also has a first feedback look, which is supplied with the output signal and which has a multibit digital-analog converter which is supplied with the output signal and which converts this output signal into a first feedback signal with an amplitude that is dependent on the output signal, and a second feedback loop, which is supplied with the comparator signal, having a digital-analog converter which converts a signal that is dependent on the comparator signal into the second feedback signal.

High-resolution sigma-delta converter

The invention relates to a forward-amplifying filter circuit which has an analogue filter with poles and zero points, having a first number of integrators which form the poles, which are arranged in series with one another and which each have an active component with a capacitance arranged in parallel therewith, having a second number of coefficients which form the zero points and which have at least one forward-amplifying path which contains a differentiating element, having a summing node whose input side is connected to the forward-amplifying paths of the zero points and whose output side is connected to the input of the last of the active components arranged in series. The invention also relates to an analog/digital converter circuit having such a filter circuit.

Forward-amplifying filter circuit

A quantizer for a sigma delta modulator comprising at least one preliminary stage V, V), the quantizer quantizing an input signal (E) present at it in accordance with at least one threshold signal (y) and outputting it as a result value (y) at a digital result output (OUT), wherein the quantizer has a number of comparators () corresponding to the number of threshold signals (y), which compare the input signal (E) with the respective threshold signal (y), the threshold signal being reduced or increased by a correction voltage (y) or a correction current, the correction voltage or correction current being generated in accordance with the result value (y) output at the result output (OUT).

Sigma-delta-modulator

The invention relates to a quantizer () for a sigma delta modulator () having at least one input stage (), the quantizer quantizing an input signal () present at its input stage in accordance with at least one threshold signal and outputting it as result value () at a digital result output (). Furthermore, the invention relates to a sigma delta modulator having such a quantizer.

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Villach, Austria

Lukas Doerrer