Intel Corporation

Luis F Cruz Camacho

Abhishek R Appu

Joydeep Ray

Vasanth Ranganathan

Karol A Szerszen

Saikat Mandal

Altug Koker

Prasoonkumar Surti

Saurabh Sharma

Vamsee Vardhan Chivukula

Aleksander Olek Neyman

Akshay R Chada

Art Hunter

Subramaniam M Maiyuran

Jorge F Garcia Pabon

Briefly, in accordance with one or more embodiments, a processor performs a coarse depth test on pixel data, and performs a final depth test on the pixel data. Coarse depth data is stored in a coarse depth cache, and per pixel depth data is stored in a per pixel depth cache. If a result of the coarse depth test is ambiguous, the processor is to read the per pixel depth data from the per pixel depth cache, and to update the coarse depth data with the per pixel depth data if the per pixel depth data has a smaller depth range than the coarse depth data.

Hierarchical depth buffer back annotation

An apparatus to facilitate pixel compression is disclosed. The apparatus includes a rasterizer module to convert an image to a plurality of pixels, an interface coupled to the rasterizer module, a depth check module coupled to the interface and compression logic to perform a compression encoding on the plurality of pixels, including dividing the plurality of pixels into a mega pixel block having a plurality of pixel blocks, determining coverage information for pixels in each of the plurality of pixel blocks, encoding each of the plurality of pixel blocks based on the coverage information to generate a mega encoded block.

Pixel compression mechanism

Hierarchical depth buffer back annotaton

Growing community of inventors

Folsom, CA, United States of America

Luis F Cruz Camacho