Nvidia Corporation

Ludger Mimberg

David Wyatt

Michael B Diamond

Anthony Michael Tamasi

Brian Kelleher

Ross F Jatou

Joseph Douglass Walters

Rambod Jacoby

Luc R Bisson

David G Reed

Abraham Benjamin De Waal

Gary D Hicok

Philip Browning Johnson

Barry A Wagner

Yu Qing Cheng

Kevin J Kranzusch

Brian Roger Loiler

Hans Wolfgang Schulze

Senthil S Velmurugan

John Lam

Srikanth Lakshmikanthan

Mau Lao

Liping Yu

One embodiment of the present invention sets forth a method for accessing display configuration information in a multi-graphics-processing-unit (multi-GPU) system, which includes the steps of asserting a select signal to steer the display configuration information of a display device, which is coupled to a discrete GPU (dGPU), to a motherboard GPU (mGPU) in the multi-GPU system if dGPU is unavailable, and validating the display configuration information prior to availing the dGPU or the display device as an option to be selected.

Method and system for steering access to display configuration information in a multi-GPU system

One embodiment of the present invention sets forth a method for accessing display configuration information of a display device in a multi-graphics-processing-unit (multi-GPU) system based on a hot-plug detection signal associated with the same display device. The method includes the steps of changing the power state of a discrete GPU (dGPU) in the multi-GPU coupled to the display device after having detected an assertion of the hot-plug detection signal, retrieving the display configuration information of the display device with the dGPU, and powering down the dGPU after having retrieved the display configuration information.

Method and system for accessing display configuration information in a multi-GPU system using hot-plug detection signals

Embodiments of the present disclosure provide techniques for identifying a display when a graphics processing unit (GPU) connected to the display via a display control bus is in a low power state. By providing a separate microcontroller with a parallel connection to the display control bus, the microcontroller may detect the presence of a display device even when the GPU is in the low power state. In response to detecting the display device, the microcontroller may notify a motherboard chipset (e.g., via an interrupt) prompting the motherboard chipset to initiate a sequence to bring the GPU out of the low power state.

Method for identifying a display when a GPU connected to the display is powered down

One embodiment of a field changeable rendering system includes an output device interfaced to a motherboard, a fixed rendering device mounted to the motherboard for generating information to be output on said output device, a connector for attaching a field-changeable rendering card to the motherboard, said field-changeable rendering card capable of housing a discrete rendering device for generating information to be output on said output device and detection circuitry for detecting that a field-changeable rendering card housing a discrete rendering device is coupled to said connector and causing information from said field-changeable rendering card housing a discrete rendering device to be output on said output device. One advantage of the disclosed edge connector is that it is compatible with a plurality of graphics cards and systems, thereby enabling a computing device user to upgrade the existing device's graphics system. Thus, the user is not forced to purchase an entirely new computing device in order to take advantage of graphics innovations. A further advantage of the disclosed edge connector is that it enables upgrades to low voltage differential signaling (LVDS) features, without the need for additional costly devices capable of operating at LVDS data rates.

Field changeable rendering system for a computing device

In a computer system with multiple processing units, power to one or more of the processing units is turned off while the other processing units remain powered on. The processing unit that is powered off may be a GPU on a graphics adapter card, and power to this GPU is controlled by turning on and off the power supplied through a voltage regulator. With this configuration, power to the GPU on the graphics adapter card can be turned off when it is not in use or when it is being used for graphics processing that another graphics processor can handle.

Method and apparatus for controlling power to a processing unit

A power supply connected to an electrical load that supplies an output voltage to the electrical load. The power supply includes a first portion having a fast transient response topology that supplies a first part of an output current, and a second portion having a slow transient response topology that supplies a second part of the output current, such that the second part of the output current does not increase or decrease as fast as the first part of the output current. Advantageously, embodiments of the invention provide a more efficient power supply design that converts part of the total power supply output current using a fast transient response portion and part using a slow transient response portion of the power supply. Additionally, embodiments of the invention provide an alternate current path for transporting large amounts of current to a GPU, while maintaining the efficiency of the overall current path.

Dual-mode power supply

A system and method are provided for directly coupling a chassis and a heat sink. A circuit board is provided with at least one processor mounted thereon. Additionally, a heat sink is provided, the heat sink being mechanically coupled to at least one of the circuit board and the processor for providing thermal communication between the heat sink and the circuit board. Furthermore, a mount is provided, the mount being coupled to the heat sink for providing a direct mechanical coupling with a chassis.

System and method for directly coupling a chassis and a heat sink associated with a circuit board or processor

One embodiment of the present invention sets forth a method for accessing display configuration information in a multi-GPU system, which includes the steps directing the display configuration information of a display device, coupled to a discrete GPU (dGPU), to a controller capable of accessing a display data bus, if the dGPU is unavailable, wherein the controller is capable of making the display configuration information available via a system interface, and validating the display configuration information prior to availing the dGPU or the display device as an option to be selected.

Method and system for accessing display configuration information in a multi-GPU system via an embedded controller

A system provides a digital multi-bit connection between two or more graphics adapters. Each graphics adapter is manufactured as a printed circuit board including a finger-type edge connector. When two or more graphics adapters are installed in a system the edge connectors of each graphics adapter may be coupled to each other via a connection device that provides a portion of the digital multi-bit connection. The remainder of the digital multi-bit connection is provided by conductive traces coupling each finger of the edge connector to a graphics processing unit that is affixed to the graphics adapter. The connection device may be installed by an end-user as each additional graphics adapter is installed in the system.

Multiple graphics adapter connection systems

The present invention performance enhancement and reliability maintenance system and method pushes a processor to its maximized performance capabilities when performing processing intensive tasks (e.g.,D graphics, etc). For example, a clock speed and voltage are increased until an unacceptable error rate begins to appear in the processing results and then the clock speed and voltage are backed off to the last setting at which excessive errors did not occur, enabling a processor at its full performance potential. The present invention also includes the ability to throttle back settings which facilitates the maintenance of desired reliability standards. The present invention is readily expandable to provide adjustment for a variety of characteristics in response to task performance requirements. For example, a variable speed fan that is software controlled can be adjusted to alter the temperature of the processor in addition to clock frequency and voltage.

Processor performance adjustment system and method

Embodiments for generating a boost voltage in a computing platform are disclosed.

Boost voltage generation

One embodiment of a reconfigurable graphics processing system includes a first MXM edge connector and a second MXM edge connector affixed to an interposer board and a first MXM board and a second MXM board coupled to the interposer board via the first and second MXM edge connectors, respectively. Each MXM board includes a GPU and other elements necessary to process graphics data. The system couples to the motherboard of a computing device through an interface connector on the interposer board. One advantage of such a system is that it may be configured to deliver more performance than a standard desktop graphics board, while occupying substantially the same volume, through the use of multiple, small form factor MXM boards.

Reconfigurable graphics processing system

A system and method for providing a dedicated interface between two or more graphics adapters installed on a motherboard. Surplus signals within an interface conforming to an interface specification are used to create the dedicated interface. The dedicated interface may connect the two or more graphics adapters using connectors via an interface device. Alternatively the dedicated interface may directly connect the two or more graphics adapters using dedicated connectors or a portion of the connectors coupled through conductive traces integrated onto the motherboard.

Connecting graphics adapters

Embodiments of methods, apparatuses, devices, and/or systems for power delivery for electronic assemblies are disclosed.

Power delivery for electronic assemblies

Embodiments of the present invention provide a low noise and high efficiency fan speed controller. The fan speed controller generates a pulse width modulation signal. The pulse width modulation signal is utilized to switch mode convert a supply voltage into a linear voltage. The voltage level of the linear voltage is a function of the pulse width modulation signal. The linear voltage is utilized to control the operating speed of a direct current fan.

Growing community of inventors

San Jose, CA, United States of America

Ludger Mimberg