Applied Materials, Inc.

Lucien Date

Christopher Sean Olsen

Udayan Ganguly

Sean M Seutter

Theresa Kramer Guarini

Shreyas Kher

Yonah Cho

David Chu

Johanes Swenburg

Paul William Turnbull

A non-volatile memory semiconductor device comprising a semiconductor substrate having a channel and a gate stack above the channel. The gate stack comprises a tunnel layer adjacent to the channel, a charge trapping layer above the tunnel layer, a charge blocking layer above the charge trapping layer, a control gate above the charge blocking layer, and an intentionally incorporated interface region between the charge trapping layer and the charge blocking layer. The charge trapping layer comprises a compound including silicon and nitrogen, the charge blocking layer contains an oxide of a charge blocking component, and the interface region comprises a compound including silicon, nitrogen and the charge blocking component. The tunnel layer may comprise up to three tunnel sub-layers, the charge trapping layer may comprise two trapping sub-layers, and the charge blocking layer may comprise up to five blocking sub-layers. Various gate stack formation techniques can be employed.

Multi-layer charge trap silicon nitride/oxynitride layer engineering with interface region control

Methods for forming a dielectric layer on a substrate are provided herein. In some embodiments a method for forming a dielectric layer on a substrate may include exposing the substrate to a first source gas comprising a silicon precursor and an oxidizer for a first period of time to form a first layer comprising silicon and oxygen; and exposing the substrate to a second source gas comprising a metal precursor and the silicon precursor for a second period of time to form a second layer comprising silicon and a metal, where in the first layer and the second layer form the dielectric layer.

Methods for forming dielectric layers

Embodiments described herein generally relate to flash memory devices and methods for manufacturing flash memory devices. In one embodiment, a method for selective removal of nitrogen from the nitrided areas of a substrate is provided. The method comprises positioning a substrate comprising a material layer disposed adjacent to an oxide containing layer in a processing chamber, exposing the substrate to a nitridation process to incorporate nitrogen onto the material layer and the exposed areas of the oxide containing layer, and exposing the nitrided material layer and the nitrided areas of the oxide containing layer to a gas mixture comprising a quantity of a hydrogen containing gas and a quantity of an oxygen containing gas to selectively remove nitrogen from the nitrided areas of the oxide containing layer relative to the nitrided material layer using a radical oxidation process.

Enhancing NAND flash floating gate performance

Methods of forming aluminum oxide layers on substrates are disclosed. In some embodiments, the method includes depositing an aluminum oxide seed layer on the substrate using a first process having a first deposition rate. The method further includes depositing a bulk aluminum oxide layer atop the seed layer using a metalorganic chemical vapor deposition (MOCVD) process having a second deposition rate greater than the first deposition rate.

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Ottignies LLN, Belgium

Lucien Date