Infineon Technologies Ag

Luca Valli

Richard Gaggl

Benno Muehlbacher

Dietmar Straeussnigg

Elmar Bach

Francesco Polo

Wilfried Florian

In accordance with an embodiment, a digital microphone interface circuit includes a delta-sigma analog-to-digital converter (ADC) having an input configured to be coupled to a microphone, a digital lowpass filter coupled to an output of the delta-sigma ADC, and a digital sigma-delta modulator coupled to an output of the digital lowpass filter. The delta-sigma ADC, the digital lowpass filter, and the digital sigma-delta modulator are configured to operate at different sampling frequencies.

Digital silicon microphone with interpolation

A circuit for biasing a MEMS microphone includes a first group of serially-coupled transistors coupled between a first node and a second node, a second group of serially-coupled transistors coupled between the first node and the second node, and a voltage divider circuit coupled to the second node having a number of outputs, a first group of outputs being coupled to corresponding control nodes associated with the first group of serially-coupled transistors, and a second group of outputs different from the first group of outputs coupled to corresponding control nodes associated with the second group of serially-coupled transistors, the control nodes being either bulk nodes or gate nodes.

PVT compensated resistive biasing architecture for a capacitive sensor

According to an embodiment, a circuit includes a high-&#x3a9; resistor including a plurality of semiconductor junction devices coupled in series and a plurality of additional capacitances formed in parallel with the plurality of semiconductor junction devices. Each semiconductor junction device of the plurality of semiconductor junction devices includes a parasitic doped well capacitance configured to insert a parasitic zero in a noise transfer function of the high-&#x3a9; resistor. Each additional capacitance of the plurality of additional capacitances is configured to adjust a parasitic pole in the noise transfer function of the high-&#x3a9; resistor in order to compensate for the parasitic zero.

System and method for a high-ohmic resistor

A signal amplification method includes receiving, from a capacitive sensor, a first input signal by a first control terminal of a first transistor, and a second input signal by a first control terminal of a second transistor. The method also includes producing a first output signal, including amplifying a first signal at a first load path terminal of the first transistor using a first inverting amplifier having an output coupled to a resistance network, and producing a second output signal, including amplifying a second signal at a first load path terminal of the second transistor using a second inverting amplifier having an output coupled to the resistance network. The method also includes feeding back the first and second output signal to a second load path terminal of the first transistor and to a second load path terminal of the second transistor via the resistance network according to a pre-determined fraction.

System and method for signal amplification using a resistance network

In accordance with an embodiment, a cancelation circuit includes a current mirror and a low pass filter. The current mirror includes an input terminal configured to accept an input current comprising a first noise signal, a first mirrored output and a second mirrored output. The low pass filter includes an input coupled to the first mirrored output and an output coupled to the second mirrored output. A sum of a current from the second mirrored output and a current of from the output of the low pass filter includes a phase-inverted version of the first noise signal.

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Villach, Austria

Luca Valli