Abb Research Ltd.

Abb Schweiz Ag

Luc Meysenc

Peter Karl Steimer

Peter Barbosa

Philippe Noisette

Philippe Stefanutti

Nicolas Hugo

Alper Akdag

Thierry Meynard

Jürgen Steinke

Gerold Knapp

Manfred Winkelnkemper

Pieder Joerg

Rudolf Wieser

Paul Rudolf

Gerhard Hochstuhl

Alice Piazzesi

Amina Hamidi

Juergen Steinke

Nikola Celanovic

Michael Mazur

A circuit that electrically controls power includes at least one power control device and at least one heat extraction device. The at least one extraction device is in thermal contact with the at least one power control device. The heat extraction device is arranged such that it can be clamped to a fixed predefined electric potential and electrically insulated by the at least one power control device.

Circuit arrangement for electrically controlling power and cooling arrangement

A power supply system for railway traction applications including a multilevel AC/DC converter. The converter comprises a plurality of series-connected single-stage cycloconverters or direct AC frequency converters connected between an AC supply line and a traction transformer. The transformer is operable at a transformer nominal frequency below 3 kHz and above the AC line frequency. On the secondary side of the transformer, more than one parallel-connected secondary converter are provided and connected to a DC link. In case of failure of one of the secondary converters, the multilevel AC/DC converter may continue to operate with reduced power delivered by the remaining operating levels.

Multilevel AC/DC converter for traction applications

A power loop has a power-loop emitter and a power-loop receptor located in different housings and connected via a power-loop conductor that is at least partially exterior to both housings. By means of a current transformer inductively coupling the conductor to the emitter or receptor, the power-loop also provides for electrical insulation between the emitter and the receptor. The emitter and receptor being distant from each other offers greater flexibility in the positioning and design of the galvanic separation between the emitter and the receptor or the supplied gate-drive, respectively. For example, the local voltages of converter levels ranging up to the supply voltage of e.g. 21 kV RMS of the multilevel converter can thus be insulated from the global earth potential of the power-loop emitter. Several power-loop receptors can be coupled to the same power-loop conductor to be fed by the same power-loop emitter.

Multilevel converter arrangement

The document specifies a method for fault handling in a converter circuit for switching three voltage levels, in which the converter circuit has a converter subsystem provided for each phase (R,S,T), in which a top fault current path (A) or a bottom fault current path (B) in the converter subsystem is detected, the top fault current path (A) running through the first, second, third and sixth power semiconductor switches in the converter subsystem or through the first and fifth power semiconductor switches (S, S) in the converter subsystem, and the bottom fault current path (B) running through the second, third, fourth and fifth power semiconductor switches in the converter subsystem or through the fourth and sixth power semiconductor switches in the converter subsystem, and in which the power semiconductor switches are switched on the basis of a fault switching sequence. To avoid phase shorting of all the phases of the converter circuit in order to achieve a safe operating state for the converter circuit in the event of a fault, the fault switching sequence in the event of detection of the top or the bottom fault current path (A, B) is initially followed by the detection's accompanying switching status of each power semiconductor switch being recorded. In addition, in the event of detection of the top fault current path (A) the first power semiconductor switch and then the third power semiconductor are turned off, and in the event of detection of the bottom fault current path (B) the fourth power semiconductor switch and then the second power semiconductor are turned off.

Method for fault handling in a converter circuit for wiring of three voltage levels

A converter circuit is disclosed for switching of a multiplicity of switching voltage levels, which have n first switching groups for each phase (R, S, T), with the n-th first switching group being formed by a first drivable bidirectional power semiconductor switch and a second drivable bidirectional power semiconductor switch, and with the first switching group to the (n&#x2212;1)-th switching group each being formed by a first drivable bidirectional power semiconductor switch and a second drivable bidirectional power semiconductor switch, and by a capacitor which is connected to the first and second drivable bidirectional power semiconductor switches with each of the n first switching groups being connected in a linked form to the respectively adjacent first switching group, and with the first and the second drivable bidirectional power semiconductor switches in the first switching group being connected to one another.

Converter circuit for switching of a multiplicity of switching voltage levels

A converter circuit is specified for switching a large number of switching voltage levels, which has n first switching groups for each phase, with the n-th first switching group being formed by a first power semiconductor switch and a second power semiconductor switch, and with the first first switching group to the-th switching group each being formed by a first power semiconductor switch and a second power semiconductor switch and by a capacitor, which is connected to the first and second power semiconductor switches, with each of the n first switching groups being connected in series to the respectively adjacent first switching group, and with the first and the second power semiconductor switches in the first first switching group being connected to one another. In order to reduce the amount of electrical energy stored in the converter circuit, n&#x2267;1 and p second switching groups and p third switching groups are provided, which are each formed by a first power semiconductor switch and a second power semiconductor switch and by a capacitor which is connected to the first and second power semiconductor switches, where p&#x2267;1 and each of the p second switching groups is connected in series with the respectively adjacent second switching group, and each of the p third switching groups is connected in series with the respectively adjacent third switching group, and the first second switching group is connected to the first power semiconductor switch in the n-th first switching group, and the first third switching group is connected to the second power semiconductor switch in the n-th first switching group. Furthermore, the capacitor in the p-th second switching group is connected in series with the capacitor in the p-th third switching group.

Converter circuit for switching a large number of switching voltage levels

The power module housing comprises two electrically insulating housing elements ( ) that are attached to each other. A first of said housing elements ( ) comprises at least two openings ( ) for electric power terminals ( ) and a slot-like recess ( ). Between the openings ( ) three insulating walls ( ) are arranged on and perpendicular to a surface of the housing. One insulating wall ( ) is part of a second of said housing elements ( ) and is inserted into the recess ( ) in said first housing element ( ), while an at least one second of said insulating walls ( ) is part of the first housing element ( ). The insulating walls between the openings for the power terminals allow a compact arrangement of the terminals.

Module housing and power semiconductor module

Growing community of inventors

Saint Egrève, France

Luc Meysenc