Dalsa Semiconductor Inc.

Mitel Corporation

Zarlink Semiconductor Limited

Teledyne Dalsa Semiconductor, Inc.

Luc M Ouellet

Yves Tremblay

Robert Antaki

Jonathan Lachance

Stephane Martel

Stephane Blain

Luc Gendron

Sylvie Archambault

Heather Tyler

Yan Riopel

Sebastien Michel

Manuel Grondin

Vincent Fortin

Abdellah Azelmad

Ted Darwall

Annie Dallaire

Daniel Brassard

Sarkar Dilip K

El Khakani My Ali

Jules J Poisson

Karine Turcotte

Jun Li

Ghislain Migneault

Paul Ignatiuk

Veronique Giard

Patrick Wright

Mamur Chowdhury

A MEMS device is manufactured by first forming a self-aligned monolayer (SAM) on a carrier wafer. Next, a first polymer layer is formed on the self-aligned monolayer. The first polymer layer is patterned form a microchannel cover, which is then bonded to a patterned second polymer layer on a device wafer to form microchannels. The carrier wafer is then released from the first polymer layer.

Method of making BIOMEMS devices

A wafer level package for a MEMS device is made by bonding a MEMS wafer and a lid wafer together to form a hermetically sealed cavity. One or more vias filled with conductive or semiconductive material is etched one of the wafers to form one or more rods extending through the wafer. The rods provide electrical connection to components within the hermetically sealed cavity.

Method of making MEMS wafers

A structural film, typically of silicon, in MEMS or NEMS devices is fabricated by depositing the film in the presence of a gas other than nitrogen, and preferably argon as the carrier gas.

Method of controlling film stress in MEMS devices

A method is disclosed for making a MEMS device wherein anhydrous HF exposed silicon nitride is used as a temporary adhesion layer allowing the transfer of a layer from a Carrier Wafer to a Device Wafer.

Microchannels for BioMEMS devices

A method of making a MEMS device is disclosed wherein anhydrous HF exposed silicon nitride is used as a temporary adhesion layer to permit the transfer of a layer from a carrier substrate to a receiving substrate.

Protection capsule for MEMS devices

A method of making optical quality films is described. A silica film is deposited on a wafer by PECVD (Plasma Enhanced Chemical Vapor Deposition). The deposited film is then subjected to a first heat treatment to reduce optical absorption, wafer warp, and compressive stress. A second film is deposited. This step is then followed by a second heat treatment to reduce optical absorption, wafer warp and tensile stress. The two heat treatments have similar temperature profiles.

Method of reducing stress-induced mechanical problems in optical components

A method of making an etched structure in the fabrication of a MEMS device involves depositing a bulk layer, typically of polysilicon, prone to surface roughness. At least one layer of photo-insensitive spin-on planarizing material, such as silicate-based spin-on glass, is formed on the bulk layer to reduce surface roughness. This is patterned with a photoresist layer. A deep etch is then performed through the photoresist layer into the bulk layer. This technique results in much more precise etch structures.

Fabrication of MEMS devices with spin-on glass

A method of fabricating a silicon-based microstructure is disclosed, which involves depositing electrically conductive amorphous silicon doped with first and second dopants to produce a structure having a residual mechanical stress of less than +/=100 Mpa. The dopants can either be deposited in successive layers to produce a laminated structure with a residual mechanical stress of less than +/=100Mpa or simultaneously to produce a laminated structure having a mechanical stress of less than +/=100Mpa.

Method of fabricating silicon-based MEMS devices

A method of etching a sacrificial oxide layer covering an etch-stop silicon nitride underlayer, involves exposing the sacrificial oxide to anhydrous HF at a temperature of less than about 100&#xb0; C. and/or at vacuum level lower than 40 Torr; and subsequently performing an in-situ vacuum evaporation of etch by-products at a temperature of more than about 100&#xb0; C. and at vacuum level lower than the 40 Torr without exposure to ambient air.

Anhydrous HF release of process for MEMS devices

A process for making an integrated circuit is described wherein sequence of mask steps is applied to a substrate or epitaxial layer of p-type material. The sequence consists of sixteen specific mask steps that permit a variety of bipolar/CMOS/DMOS devices to be fabricated. The mask steps include (1) forming at least one N-well in the p-type material, (2) forming an active region, forming a p-type field region, (4) forming a gate oxide, (5) carrying out a p-type implantation, (6) forming polysilicon gate regions, (7) forming a p-base region, (8) forming a N-extended region, (9) forming a p-top region, 10) carrying out an N+ implant, (11) carrying out a P+ implant, (12) forming contacts, (13) depositing a metal layer, (14) forming vias, (15) depositing a metal layer therethrough, and (16) forming a passivation layer. Up to any three of mask steps (4), (7), (8), and (9) may be omitted depending on the type of integrated circuit.

Method of making high-voltage bipolar/CMOS/DMOS (BCD) devices

A method is disclosed for making a wafer-level package for a plurality of MEMS devices. The method involves preparing a MEMS wafer and a lid wafer, each having respective bonding structures. The lid and MEMS wafers are then bonded together through the bonding structures. The wafers are substantially free of alkali metals and/or chlorine. IN a preferred embodiment, each wafer has a seed layer, a structural underlayer and an anti-oxidation layer. A solder layer, normally formed on the lid wafer, bonds the two wafers together.

Hermetic wafer-level packaging for MEMS devices with low-temperature metallurgy

A micro-electro-mechanical (MEM) device and an electronic device are fabricated on a common substrate by fabricating the electronic device comprising a plurality of electronic components on the common substrate, depositing a thermally stable interconnect layer on the electronic device, encapsulating the interconnected electronic device with a protective layer, forming a sacrificial layer over the protective layer, opening holes in the sacrificial layer and the protective layer to allow the connection of the MEM device to the electronic device, fabricating the MEM device by depositing and patterning at least one layer of amorphous silicon, and removing at least a portion of the sacrificial layer. In this way, the MEM device can be fabricated after the electronic device on the same substrate.

Fabrication of advanced silicon-based MEMS devices

A method of fabricating a silicon-based microstructure is disclosed, which involves depositing electrically conductive amorphous silicon doped with first and second dopants to produce a structure having a residual mechanical stress of less than +/=100 Mpa. The dopants can either be deposited in successive layers to produce a laminated structure with a residual mechanical stress of less than +/=100 Mpa or simultaneously to produce a laminated structure having a mechanical stress of less than +/=100 Mpa.

A method is disclosed for fabricating a integrated device, such as a MEMS device. A first wafer is provided on an exposed surface with a layer of gold, gold alloy or gold compound. A second wafer is provided on its exposed surface with under-layer of gold, gold alloy or gold compound; and an over- of bismuth, bismuth alloy, a compound of bismuth, cadmium, cadmium alloy, a compound of cadmium compound, tin, tin alloy, or a compound of tin. The wafers are then brought into contact and bonded at their surfaces through the deposited layers.

Wafer level packaging technique for microdevices

A method of making a film with a high dielectric constant uses a spin-on sol-gel process to deposit the film on a substrate, the film having a composition (SiO)(TiO), where 0.50&#x3c;x&#x3c;0.75. The resulting film is annealed in an oxygen-containing atmosphere at a temperature lying in the range of 500&#xb0; C. to 700&#xb0; C.

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Granby, Canada

Luc M Ouellet